ATA8741-PXQW Atmel, ATA8741-PXQW Datasheet - Page 126

MCU W/TRANSMITTER ASK/FSK 24QFN

ATA8741-PXQW

Manufacturer Part Number
ATA8741-PXQW
Description
MCU W/TRANSMITTER ASK/FSK 24QFN
Manufacturer
Atmel
Datasheet

Specifications of ATA8741-PXQW

Frequency
310MHz ~ 350MHz
Applications
Home Automation, Remote Sensing, RKE
Modulation Or Protocol
ASK, FSK
Data Rate - Maximum
32 kBit/s
Power - Output
6dBm ~ 10.5dBm
Current - Transmitting
9.8mA
Data Interface
PCB, Surface Mount
Antenna Connector
PCB, Surface Mount
Memory Size
4kB Flash, 256B EEPROM, 256B SRAM
Voltage - Supply
2 V ~ 4 V
Operating Temperature
-40°C ~ 85°C
Package / Case
24-VQFN Exposed Pad, 24-HVQFN, 24-SQFN, 24-DHVQFN
Processor Series
ATA8x
Core
AVR8
Data Bus Width
8 bit
Program Memory Type
Flash
Program Memory Size
4 KB
Data Ram Size
256 B
Interface Type
SPI, USI
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATA8741-PXQW
Manufacturer:
ATMEL
Quantity:
6 000
21.10 Timer/Counter Timing Diagrams
126
ATA8741
Using the ICR1 Register for defining TOP works well when using fixed TOP values. By using
ICR1, the OCR1A Register is free to be used for generating a PWM output on OC1A. However,
if the base PWM frequency is actively changed by changing the TOP value, using the OCR1A as
TOP is clearly a better choice due to its double buffer feature.
In phase and frequency correct PWM mode, the compare units allow generation of PWM wave-
forms on the OC1x pins. Setting the COM1x1:0 bits to two will produce a non-inverted PWM and
an inverted PWM output can be generated by setting the COM1x1:0 to three (See
page
port pin is set as output (DDR_OC1x). The PWM waveform is generated by setting (or clearing)
the OC1x Register at the compare match between OCR1x and TCNT1 when the counter incre-
ments, and clearing (or setting) the OC1x Register at compare match between OCR1x and
TCNT1 when the counter decrements. The PWM frequency for the output when using phase
and frequency correct PWM can be calculated by the following equation:
The N variable represents the prescaler divider (1, 8, 64, 256, or 1024).
The extreme values for the OCR1x Register represents special cases when generating a PWM
waveform output in the phase correct PWM mode. If the OCR1x is set equal to BOTTOM the
output will be continuously low and if set equal to TOP the output will be set to high for
non-inverted PWM mode. For inverted PWM the output will have the opposite logic values.
The Timer/Counter is a synchronous design and the timer clock (clk
clock enable signal in the following figures. The figures include information on when interrupt
flags are set, and when the OCR1x Register is updated with the OCR1x buffer value (only for
modes utilizing double buffering).
ting of OCF1x.
Figure 21-10. Timer/Counter Timing Diagram, Setting of OCF1x, no Prescaling
Figure 21-11 on page 127
130). The actual OC1x value will only be visible on the port pin if the data direction for the
OCRnx
TCNTn
OCFnx
(clk
clk
clk
I/O
I/O
Tn
/1)
OCRnx - 1
shows the same timing data, but with the prescaler enabled.
f
OCnxPFCPWM
Figure 21-10 on page 126
OCRnx
OCRnx Value
=
---------------------------------
2
f
clk_I/O
N
TOP
OCRnx + 1
shows a timing diagram for the set-
T1
) is therefore shown as a
OCRnx + 2
9140C–INDCO–02/10
Table 21-3 on

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