AS3977-BQFT austriamicrosystems, AS3977-BQFT Datasheet - Page 38

• Manufacturer Part Number: AS3977-BQFT
• Description: IC RF TRANSMITTER FSK 16-QFN
• Manufacturer: austriamicrosystems

Specifications of AS3977-BQFT

• Frequency: 300MHz ~ 928MHz
• Applications: ISM
• Modulation Or Protocol: FSK
• Data Rate - Maximum: 100 kbps
• Power - Output: 10dBm
• Data Interface: PCB, Surface Mount
• Antenna Connector: PCB, Surface Mount
• Voltage - Supply: 2 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-VQFN Exposed Pad, 16-HVQFN, 16-SQFN, 16-DHVQFN
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Memory Size: -
• Current - Transmitting: -

AS3977
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
Baud Rate Generator
The main functionality of the module is to generate clocks with programmed periods. The first action is to change the
parameters followed by starting a transmission.
Reference Design PREOUT and PAOUT Connection
For all RF Specification, refer to the Reference Design. The PAOUT pin is Power Line matched to 50Ω load wherein a
power of 8dBm@315MHz/433MHz and 4dBm@868MHz/915MHz is spent typically.
Matching Circuit and PREOUT and PAOUT Connections to the Supply Voltage
Figure 13
the values for several settings, varying the operation frequency and the Supply Voltage source. Supply blocking
capacitors are not shown in the schematic
Figure 13. Schematic
www.austriamicrosystems.com
Changing PSC, TCV, ASC and CLKS parameters
As soon as the crystal oscillator clock is active, pre scaler and after scaler timer configuration parameters are
continuously updated from the SDI registers. To avoid spurious emissions, these synchronized values cannot be
immediately used for new clock generation because the circuit has to take care about current and new clock phase
difference. Then, as soon as the phase difference between them is zero, an enable signal is generated and new
values are stored to the final registers that will be used for the normal functionality of the circuit. At this point the
new clock will start without spurious periods.
Starting a transmission
A typical situation is as follows – After start up and configuration, the circuit goes in Power Down Mode. Then a
wake up event occurs on the SDI interface and the internal crystal oscillator starts running (after a setup time). The
wake up event is typically a rising edge on the SDI enable input that samples the SDI data e.g. to the LOW value
and this resets the MCCLK frequency to be 1/16 of the oscillator frequency and makes the clock always active. At
this point the micro-controller starts its activity and it can decide to reprogram MCCLK frequency to the desired
value and to the desired behavior. The decision between current and new value will be done synchronously to
eliminate any possible spurious period on MCCLK (mainly if it is used). In any case it can be maintained the new
setting between different Power Down Modes or it can be reset to the default value on the first access to the SDI
interface when the circuit is in Power Down Mode.
shows the Power Line Matching and Transformation Network used on the Reference Design.
AS3977
PREOUT
PAOUT
2
1
(see Figure
Voltage
Supply
L4
Revision 3.5
C3
13).
Π Matching Network
to 50Ω
L1
SMA
Connector
Into 50Ω
Table 25
38 - 45
gives