M24LR64-RMN6T/2 STMicroelectronics, M24LR64-RMN6T/2 Datasheet - Page 67

• Manufacturer Part Number: M24LR64-RMN6T/2
• Description: 13.56MHZ 64KBIT EEPROM SO8N
• Manufacturer: STMicroelectronics

Specifications of M24LR64-RMN6T/2

• Featured Product: STM32 Cortex-M3 Companion Products
• Rf Type: Read / Write
• Frequency: 13.56MHz
• Features: 64 Kbit EEPROM
• Package / Case: 8-SOIC (0.154", 3.90mm Width)
• Memory Size: 64 KB
• Organization: 2 K x 32
• Interface Type: I2C
• Maximum Clock Frequency: 400 KHz
• Access Time: 900 ns
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.8 V
• Maximum Operating Current: 600 uA
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 497-10486-2

M24LR64-R
21
21.1
Anticollision
The purpose of the anticollision sequence is to inventory the M24LR64-Rs present in the
VCD field using their unique ID (UID).
The VCD is the master of communications with one or several M24LR64-Rs. It initiates
M24LR64-R communication by issuing the Inventory request.
The M24LR64-R sends its response in the determined slot or does not respond.
Request parameters
When issuing the Inventory Command, the VCD:
●
●
●
●
●
●
Table 30.
In the example of the
added to the mask value MSB. The 11-bit Mask and the current slot number are compared
to the UID.
Table 31.
MSB
SOF
sets the Nb_slots_flag as desired
adds the mask length and the mask value after the command field
The mask length is the number of significant bits of the mask value.
The mask value is contained in an integer number of bytes. The mask length indicates
the number of significant bits. LSB is transmitted first
If the mask length is not a multiple of 8 (bits), as many 0-bits as required will be added
to the mask value MSB so that the mask value is contained in an integer number of
bytes
The next field starts at the next byte boundary.
Request_
0-bits added
(b
8 bits
flags
0000 0
15
Inventory request format
Example of the addition of 0-bits to an 11-bit mask value
) MSB
Command
8 bits
Table 31
Doc ID 15170 Rev 12
Optional
and
8 bits
AFI
Figure
length
Mask
8 bits
50, the mask length is 11 bits. Five 0-bits are
11-bit mask value
100 1100 1111
LSB (b
0 to 8 bytes
Mask value
0
)
16 bits
CRC
Anticollision
67/128
EOF
LSB