AS3991-BQFT austriamicrosystems, AS3991-BQFT Datasheet - Page 40

• Manufacturer Part Number: AS3991-BQFT
• Description: IC UHF RFID READER 64-QFN
• Manufacturer: austriamicrosystems

Specifications of AS3991-BQFT

• Rf Type: Read / Write
• Frequency: 840MHz ~ 960MHz
• Features: ISO-18000-6
• Package / Case: 64-VFQFN, Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: AS3991-BQFT; AS3991-BQFTTR

AS3990/AS3991
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
Transmission With CRC Expecting Header Bit (91)
This command functions similar to Transmission with CRC (90), but also informs RX decoding logic that header bit is
expected in the response (Gen 2).
Transmission Without CRC (92)
This command functions similar to Transmission with CRC (90), but CRC is excluded.
Delayed Transmission With CRC (93)
Delayed transmission is used in case the transmission needs to be started in a quite narrow time window after end of
reception. The time between end of reception and start of transmission is set in register ‘Delayed transmission wait
time’ (06)
(see Table
19). The register 06 needs to be set prior to the reception after which the delayed transmit should
be done. After sending the ‘Delayed transmission with CRC’ the TX length bytes must be set and transmission data
needs to be loaded in the FIFO. The reader transmitting is triggered by the TX timer.
Example: 93 3D 00 40 AA BB CC DD will transmit AA BB CC DD and CRC. Transmission will start after delayed
defined in reg 06. The delay time will start at the end of previous reception - despite the command is sent during the
delay is already running out.
Delayed Transmission Without CRC (94)
This command functions similar to Delayed transmission with CRC, but CRC is excluded.
Block RX (96)
The block RF command puts the digital part of receiver (bit decoder and framer) in reset. The reset of the receiver is
useful in case the system operates in an extremely noisy environment, causing a constant switching of the sub-carrier
input of the digital part of the receiver. The receiver (if not in reset) would try to ‘catch’ a Preamble and in case the
noise pattern matches the expected signal pattern, an interrupt is sent. A constant flow of interrupt requests can be a
problem for the external system (MCU), so the external system can stop this by putting the receive decoders in reset
mode. The reset mode can be terminated in two ways. One possibility is that the external system sends the ‘Enable
RX’ command. The reset mode is also automatically terminated at the end of TX operation. The receiver can stay in
reset also after end of TX if the ‘RX wait time’ registers (address 08) is set. In this case, the receiver is enabled at the
end of the wait time following the transmit operation.
Enable RX (97)
This command clears the reset mode in the digital part of the receiver, if the reset mode was entered on the request by
the ‘Block RX’ command.
EPC GEN2 Specific Commands
Query (98)
The Query command must be followed by 3F (continuous FIFO write) and two bytes of query data (00, DR, M, TRext,
Sel, Session, Target, Q). Since this gives 15 applicable bits the last LSB bit is disregarded. Transmitter issues
preamble, command, TX data and CRC-5. The received RN16 is stored in an internal register for further
communication (ACK…). RN 16 is also achievable from the FIFO.
QueryRep (99)
The QueryRep command issues the command followed by two session bits. The session bits are taken from ‘TX
options’ (02) register. The received RN16 is stored in an internal register for further communication (ACK). RN 16 is
also achievable from the FIFO.
QueryAdjustUp (9A)
The QueryAdjustUp command issues the command QueryAdjust followed by two session bits and ‘up’ parameter
(increase number of slots Q). The session bits are taken from ‘TX options’ (02) register. The received RN16 is stored in
an internal register for further communication (ACK…). RN 16 is also achievable from the FIFO.
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