T555711-DDW Atmel, T555711-DDW Datasheet - Page 3
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T555711-DDW
Manufacturer Part Number
T555711-DDW
Description
IC IDIC R/W RFID 330BIT ON-CHIP
Manufacturer
Atmel
Series
T555711r
Datasheet
1.T555711-TAS.pdf
(34 pages)
Specifications of T555711-DDW
Rf Type
Read / Write
Frequency
125kHz
Features
330-bit EEPROM
Package / Case
DICE
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
3.2
3.3
3.4
3.5
3.6
3.7
3.8
3.9
4517J–RFID–03/06
Data-rate Generator
Write Decoder
HV Generator
DC Supply
Power-On Reset (POR)
Clock Extraction
Controller
Mode Register
The data rate is binary programmable to operate at any data rate between RF/2 and RF/128 or
equal to any of the fixed e5550/e5551 and T5554 bitrates (RF/8, RF/16, RF/32, RF/40, RF/50,
RF/64, RF/100 and RF/128).
This function decodes the write gaps and verifies the validity of the data stream according to the
Atmel e555x write method (pulse interval encoding).
This on-chip charge pump circuit generates the high voltage required for programming of the
EEPROM.
Power is externally supplied to the IDIC via the two coil connections. The IC rectifies and regu-
lates this RF source and uses it to generate its supply voltage.
This circuit delays the IDIC functionality until an acceptable voltage threshold has been reached.
The clock extraction circuit uses the external RF signal as its internal clock source.
The control-logic module executes the following functions:
The mode register stores the configuration data from the EEPROM block 0. It is continually
refreshed at the start of every block read and (re-)loaded after any POR event or reset com-
mand. On delivery the mode register is preprogrammed with the value ‘0014 8000’h which
corresponds to continuous read of block 0, Manchester coded, RF/64.
• Load-mode register with configuration data from EEPROM block 0 after power-on and also
• Control memory access (read, write)
• Handle write data transmission and write error modes
• The first two bits of the reader to tag data stream are the opcode, e.g., write, direct access or
• In password mode, the 32 bits received after the opcode are compared with the password
during reading
reset
stored in memory block 7
T5557
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