XRT94L33IB-L Exar Corporation, XRT94L33IB-L Datasheet - Page 28
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XRT94L33IB-L
Manufacturer Part Number
XRT94L33IB-L
Description
IC MAPPER DS3/E3/STS-1 504TBGA
Manufacturer
Exar Corporation
Specifications of XRT94L33IB-L
Applications
Network Switches
Interface
Bus
Voltage - Supply
3.14 V ~ 3.47 V
Package / Case
504-LBGA
Mounting Type
Surface Mount
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
XRT94L33IB-L
Manufacturer:
Exar Corporation
Quantity:
10 000
XRT94L31
3-CHANNEL DS3/E3/STS-1 TO STS-3/STM-1 MAPPER IC
PIN DESCRIPTION OF THE XRT94L31 (REV. B)
PIN #
AD16
AF17
C12
B20
B11
A22
SIGNAL NAME
TXDS3CLK_0
TXDS3CLK_1
TXDS3CLK_2
TXE3CLK_0
TXE3CLK_1
TXE3CLK_2
TxOHClk_0
TxOHClk_1
TxOHClk_2
I/O
O
I
TTL
CMOS
TYPE
Transmit DS3/E3 Reference Clock Input - Channel_n (Not used for
Mapper Applications):n=[0:2]
The manner in which the user should handle this input pin depends upon
whether Channe_n has been configured to operate in the Mapper Mode
or in the ATM UNI/PPP Mode.
If Channel_n is configured to operate in the Mapper Mode:
If Channel_n has been configured to operate in the Mapper Mode, then
this input pin supports no function, and should, therefore, be connected
to GND.
If Channel_n is configured to operate in the ATM UNI/PPP/Clear
Channel Mode:
If Channel_n (within the XRT94L31) has been configured to operate in
the ATM UNI/PPP Mode, then this input pin will function as the timing
reference clock signal for the Transmit STS-1/DS3/E3 Framer block cir-
cuitry, provided that Channel_n has been configured to operate in the
Local Timing Mode.
If Channel_h has been configured to operate in the DS3 Mode, then the
user is expected to apply a 44.736MHz clock signal to this input pin.
Likewise, if Channel_n has been configured to operate in the E3 Mode,
then the user is expected to apply a 34.368MHz clock signal to this input
pin.
N
Transmit Overhead Clock Output:
This output pin functions as the Transmit Overhead Clock output for the
transmit system side interface when the XRT94L31 is configured to
operate in STS-1/DS3/E3 mode, however, it functions as the Transmit
STS-1 Overhead clock output when the device is configured to operate
in the STS-1 mode.
When configured to operate in DS3/E3 mode:
This output pin functions as the Transmit Overhead Data Input Interface
clock signal. If the user enables the Transmit Overhead Data Input Inter-
face block by asserting the TxOHIns input pin, then the Transmit Over-
head Data Input Interface block will sample and latch the data (residing
on the TxOH_n input pin) upon the falling edge of this signal.
When configured to operate in STS-1 mode:
These output pins, along with TxOH_n, TxOHEnable_n, TxOHIns_n and
TxOHFrame function as the Transmit Path Overhead (TxOH) Input Port.
The TxOHFrame and TxOHEnable output pins are updated upon the
falling edge this clock output signal. The TxOHIns_n input pins and the
data residing on the TxOH_n input pins are sampled upon the falling
edge of this clock signal.
OTE
: For more information on using the XRT94L31 for ATM UNI/PPP
applications, the user should consult the XRT94L31 1-Channel
STS-3c/3-Channel DS3/E3/STS-1 ATM UNI/PPP Data Sheet.
28
DESCRIPTION
REV. 1.0.1