NUC120LC1BN Nuvoton Technology Corporation of America, NUC120LC1BN Datasheet - Page 434
![IC MCU 32BIT 32KB FLASH 48LQFP](/photos/28/73/287345/nuc120lc1bn_sml.jpg)
NUC120LC1BN
Manufacturer Part Number
NUC120LC1BN
Description
IC MCU 32BIT 32KB FLASH 48LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™r
Specifications of NUC120LC1BN
Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
I²C, IrDA, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, LVD, POR, PS2, PWM, WDT
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number:
NUC120LC1BN
Manufacturer:
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Quantity:
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Part Number:
NUC120LC1BN
Manufacturer:
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- NUC100LC1BN PDF datasheet
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- Download datasheet (6Mb)
Interrupt Status Register (INTR)
Register
INTR
Bits
[31:8]
[7]
[6]
[5]
[4]
[3:2]
[1]
[0]
BEI
31
23
15
7
NuMicro™ NUC100 Series Technical Reference Manual
Offset
CAN0_BA+0x0C
Descriptions
Reserved
BEI
ALI
Reserved
WUI
Reserved
TI
RI
ALI
30
22
14
6
Reserved
R/W
R/W
Reserved
Bus Error Interrupt
1 = This bit will be set when this CAN node detects an error on the CAN-bus and the
0 = No bus error interrupt
Arbitration Lost Interrupt
1 = This bit will be set when this CAN node lose the arbitration to become a receiver
0 = No arbitration lost interrupt
Reserved
Wake-Up Interrupt
1 = This bit will be set when this CAN node is sleeping but be waked up by bus activity
If the wakeup interrupt active after power idle, the WAKEUP_EN bit shall be clear
before this bit to be cleared.
0 = No wake-up interrupt
Reserved
Transmit Interrupt
1 = This bit will be set when a transmission has done and the TIE bit is set within the
0 = No transmit done information
Receive Interrupt
1 = This bit will be set when a frame receiving has done and the RIE bit is set within
29
21
13
5
BEIE bit is set within the interrupt enable register. It will be clear by write 1 to this
bit.
and the ALIE bit is set within the interrupt enable register. It will be clear by write 1
to this bit.
and the WUIE bit is set within the interrupt enable register. It will be clear by write 1
to this bit.
interrupt enable register. It will be clear by write 1 to this bit.
the interrupt register. It will be clear by write 1 to this bit.
Description
Interrupt Status Register
WUI
28
20
12
4
- 434 -
Reserved
Reserved
Reserved
27
19
11
3
Reserved
Publication Release Date: Dec. 22, 2010
26
18
10
2
25
17
TI
9
1
Revision V1.06
Reset Value
0x0000_0000
24
16
RI
8
0
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