ATTINY87-XUR Atmel, ATTINY87-XUR Datasheet
ATTINY87-XUR
Specifications of ATTINY87-XUR
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ATTINY87-XUR Summary of contents
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... I/O and Packages – 16 Programmable I/O Lines – 20-pin SOIC, 32-pad MLF and 20-pin TSSOP • Operating Voltage: – 1.8 – 5.5V for ATtiny87/167 • Speed Grade: – 0 – 4 MHz @ 1.8 – 5.5V – 0 – 8 MHz @ 2.7 – 5.5V – 0 – 16 MHz @ 4.5 – 5.5V • ...
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... Self-Programmable Flash on a monolithic chip, the Atmel ATtiny87/167 is a powerful micro- controller that provides a highly flexible and cost effective solution to many embedded control applications. The ATtiny87/167 AVR is supported with a full suite of program and system development tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emula- tors, and Evaluation kits. ...
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Block Diagram Figure 1-1. 8265BS–AVR–09/10 Block Diagram Watchdog Power Timer Supervision POR / BOD & Watchdog RESET Oscillator Oscillator Flash Circuits / Clock Generation EEPROM Timer/Counter-1 Timer/Counter-0 SPI & USI Analog Comp. PORT B (8) PORT A (8) PB[0:7] ...
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... Pin Configuration Figure 1-2. Pinout ATtiny87/167 - SOIC20 & TSSOP20 (RXLIN / RXD / ADC0 / PCINT0) PA0 (TXLIN / TXD / ADC1 / PCINT1) PA1 (MISO / DO / OC0A / ADC2 / PCINT2) PA2 (INT1 / ISRC / ADC3 / PCINT3) PA3 (MOSI / SDA / DI / ICP1 / ADC4 / PCINT4) PA4 (SCK / SCL / USCK / T1 / ADC5 / PCINT5) PA5 ...
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... As inputs, Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a reset condition becomes active, even if the clock is not running. Port B also serves the functions of various special features of the ATtiny87/167 as listed on Section 9.3.4 “Alternate Functions of Port B” on page 8265BS–AVR–09/10 76 ...
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... PPM over 20 years at 85°C or 100 years at 25°C. 1.9 Disclaimer Typical values contained in this datasheet are based on simulations and characterization of other AVR microcontrollers manufactured on the same process technology. Min and Max val- ues will be available after the device has been characterized. ATtiny87/ATtiny167 6 8265BS–AVR–09/10 ...
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Register Summary Address Name Bit 7 (0xFF) Reserved (0xFE) Reserved (0xFD) Reserved (0xFC) Reserved (0xFB) Reserved (0xFA) Reserved (0xF9) Reserved (0xF8) Reserved (0xF7) Reserved (0xF6) Reserved (0xF5) Reserved (0xF4) Reserved (0xF3) Reserved (0xF2) Reserved (0xF1) Reserved (0xF0) Reserved (0xEF) ...
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... TCCR1D OC1BX (0x82) TCCR1C FOC1A (0x81) TCCR1B ICNC1 (0x80) TCCR1A COM1A1 (0x7F) DIDR1 – (0x7E) DIDR0 ADC7D/AIN1D ADC6D/AIN0D (0x7D) Reserved ATtiny87/ATtiny167 8 Bit 6 Bit 5 Bit 4 Bit 3 USIB6 USIB5 USIB4 USIB3 USID6 USID5 USID4 USID3 USIOIF USIPF USIDC USICNT3 USIOIE USIWM1 USIWM0 ...
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Address Name Bit 7 (0x7C) ADMUX REFS1 (0x7B) ADCSRB BIN (0x7A) ADCSRA ADEN (0x79) ADCH - / ADC9 (0x78) ADCL ADC7 / ADC1 (0x77) AMISCR – (0x76) Reserved (0x75) Reserved (0x74) Reserved (0x73) Reserved (0x72) Reserved (0x71) Reserved (0x70) Reserved ...
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... When using the I/O specific commands IN and OUT, the I/O addresses 0x00 - 0x3F must be used. When addressing I/O Registers as data space using LD and ST instructions, 0x20 must be added to these addresses. The ATtiny87/167 is a com- plex microcontroller with more peripheral units than can be supported within the 64 location reserved in Opcode for the IN and OUT instructions ...
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Instruction Set Summary Mnemonics Operands ADD Rd, Rr ADC Rd, Rr ADIW Rdl,K SUB Rd, Rr SUBI Rd, K SBC Rd, Rr SBCI Rd, K SBIW Rdl,K AND Rd, Rr ANDI Rd Rd, Rr ORI Rd, K ...
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... Rd, P OUT P, Rr PUSH Rr POP Rd NOP SLEEP WDR BREAK ATtiny87/ATtiny167 12 Description Logical Shift Right Rotate Left Through Carry Rotate Right Through Carry Arithmetic Shift Right Swap Nibbles Flag Set Flag Clear Bit Store from Register to T Bit load from T to Register ...
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... Wide, Plastic Gull Wing Small Outline Package (SOIC) 20X 20-lead, 4.4 mm Wide, Plastic Thin Shrink Small Outline Package (TSSOP) 8265BS–AVR–09/10 Ordering Code Package ATtiny87-MU (2) ATtiny87-MUR ATtiny87-SU (2) ATtiny87-SUR ATtiny87-XU (2) ATtiny87-XUR Package Type (1) Operational Range 32M1-A 32M1-A Industrial 20S2 (3) 20S2 (-40°C to +85°C) 20X 20X 13 ...
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... Body, Lead Pitch 0.50 mm, Micro Lead Frame Package (MLF) 20S2 20-lead, 0.300" Wide, Plastic Gull Wing Small Outline Package (SOIC) 20X 20-lead, 4.4 mm Wide, Plastic Thin Shrink Small Outline Package (TSSOP) ATtiny87/ATtiny167 14 Ordering Code Package ATtiny167-MU (2) ATtiny167-MUR ...
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Packaging Information 5.1 32M1 Pin TOP VIEW Pin #1 Notch (0. BOTTOM VIEW Note: JEDEC Standard MO-220, Fig. 2 (Anvil Singulation), VHHD-2. 2325 Orchard Parkway San ...
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... ATtiny87/ATtiny167 16 8265BS–AVR–09/10 ...
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Dimensions in Millimeters and (Inches). Controlling dimension: Millimeters. JEDEC Standard MO-153 AC 0.65 (.0256) BSC 0º ~ 8º 2325 Orchard Parkway San Jose, CA 95131 R 8265BS–AVR–09/10 PIN 1 4.50 (0.177) 4.30 (0.169) 6.60 (.260) 6.40 (.252) 0.15 ...
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... Errata 6.1 Errata ATtiny87 The revision letter in this section refers to the revision of the ATtiny87 device. 6.1.1 Rev. C • Gain control of the crystal oscillator. • ‘Disable Clock Source’ command remains enabled. 6.1.2 Rev Not sampled. 6.2 Errata ATtiny167 The revision letter in this section refers to the revision of the ATtiny167 device. ...
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Loose gain control of crystal oscillator !!! ; ==> WORKAROUND ... ; ... 3. ‘Disable Clock Source’ command remains enabled. In the Dynamic Clock Switch module, the ‘Disable Clock Source’ command remains run- ning after disabling the ...
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... Please note that the referring page numbers refer to the complete document. 7.1 Rev. 8265B – 9/10 Updated: 7.2 Rev. 8265A – 8/10 1. Initial revision created from document 7728G - 06/10. ATtiny87/ATtiny167 20 – Section 9.3.3 “Alternate Functions of Port A” on page – Section 26.2 “ATtiny167” on page – ...
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8265BS–AVR–09/10 21 ...
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