S9S08DZ16F1MLC Freescale Semiconductor, S9S08DZ16F1MLC Datasheet - Page 64
![IC MCU 8BIT 16KB FLASH 32LQFP](/photos/15/89/158999/lqfp-32_sml.jpg)
S9S08DZ16F1MLC
Manufacturer Part Number
S9S08DZ16F1MLC
Description
IC MCU 8BIT 16KB FLASH 32LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.DEMO9S08DZ60.pdf
(416 pages)
Specifications of S9S08DZ16F1MLC
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
32-LQFP
Processor Series
S08D
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
26
Operating Supply Voltage
3 V to 5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
S9S08DZ16F1MLC
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
S9S08DZ16F1MLC
Manufacturer:
FREESCALE
Quantity:
20 000
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1
Chapter 4 Memory
4.5.11.3
4.5.11.4
The FPROT register defines which Flash and EEPROM sectors are protected against program and erase
operations.
During the reset sequence, the FPROT register is loaded from the nonvolatile location NVPROT. To
change the protection that will be loaded during the reset sequence, the sector containing NVPROT must
be unprotected and erased, then NVPROT can be reprogrammed.
FPROT bits are readable at any time and writable as long as the size of the protected region is being
increased. Any write to FPROT that attempts to decrease the size of the protected memory will be ignored.
Trying to alter data in any protected area will result in a protection violation error and the FPVIOL flag
will be set in the FSTAT register. Mass erase is not possible if any one of the sectors is protected.
64
User must write a 1 to this bit. Failing to do so may result in unexpected behavior.
Background commands can be used to change the contents of these bits in FPROT.
EPGSEL
KEYACC
Reset
Reset
Field
6
5
W
W
R
R
EEPROM Page Select — This bit selects which EEPROM page is accessed in the memory map.
0 Page 0 is in foreground of memory map. Page 1 is in background and can not be accessed.
1 Page 1 is in foreground of memory map. Page 0 is in background and can not be accessed.
Enable Writing of Access Key — This bit enables writing of the backdoor comparison key. For more detailed
information about the backdoor key mechanism, refer to
0 Writes to 0xFFB0–0xFFB7 are interpreted as the start of a Flash programming or erase command.
1 Writes to NVBACKKEY (0xFFB0–0xFFB7) are interpreted as comparison key writes.
Flash and EEPROM Configuration Register (FCNFG)
0
0
Flash and EEPROM Protection Register (FPROT and NVPROT)
7
7
EPS
= Unimplemented or Reserved
1
EPGSEL
Figure 4-8. Flash and EEPROM Protection Register (FPROT)
0
6
6
This register is loaded from nonvolatile location NVPROT during reset.
Figure 4-7. Flash Configuration Register (FCNFG)
Table 4-11. FCNFG Register Field Descriptions
KEYACC
MC9S08DZ60 Series Data Sheet, Rev. 4
0
5
5
Reserved
1
4
4
Description
1
Section 4.5.9,
3
0
0
3
FPS
1
“Security.”
0
0
2
2
Freescale Semiconductor
0
0
1
1
1
1
0
0
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