MCF51JE256VLL Freescale Semiconductor, MCF51JE256VLL Datasheet - Page 35
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MCF51JE256VLL
Manufacturer Part Number
MCF51JE256VLL
Description
IC MCU 32BIT 256K FLASH 100LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51JEr
Datasheet
1.TWR-MCF51JE.pdf
(50 pages)
Specifications of MCF51JE256VLL
Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, SCI, SPI, USB OTG
Peripherals
LVD, PWM, WDT
Number Of I /o
65
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
100-LQFP
Processor Series
MCF51JE
Core
ColdFire V1
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
DEMOEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF51JE256VLL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
3.11
A multi-function external bus interface called Mini-FlexBus is provided with basic functionality to
interface to slave-only devices up to a maximum bus frequency of
to asynchronous or synchronous devices such as external boot ROMs, flash memories, gate-array logic, or
other simple target (slave) devices with little or no additional circuitry. For asynchronous devices a simple
chip-select based interface can be used.
All processor bus timings are synchronous; that is, input setup/hold and output delay are given in respect
to the rising edge of a reference clock, MB_CLK. The MB_CLK frequency is half the internal system bus
frequency.
The following timing numbers indicate when data is latched or driven onto the external bus, relative to the
Mini-FlexBus output clock (MB_CLK). All other timing relationships can be derived from these values.
Freescale Semiconductor
1
2
3
4
5
o
#
6
Data in Typical column was characterized at 3.0 V, 25°C or is typical recommended value.
When MCG is configured for FEE or FBE mode, input clock source must be divisible using RDIV to within the range of 31.25 kHz to
39.0625 kHz.
See crystal or resonator manufacturer’s recommendation.
This parameter is characterized and not tested on each device.
Proper PC board layout procedures must be followed to achieve specifications.
1
2
Crystal start-up time
Num
MB1
MB2
MB3
MB4
MB5
Specification is valid for all MB_A[19:0], MB_D[7:0], MB_CS[1:0], MB_OE, MB_R/W, and MB_ALE.
Specification is valid for all MB_D[7:0].
—
Mini-FlexBus Timing Specifications
—
C
D
D
D
T
T
Frequency of Operation
Clock Period
Output Valid
Output Hold
Input Setup
Input Hold
Table 18. XOSC (Temperature Range = –40 to 105
4, 5
Characteristic
Table 19. Mini-FlexBus AC Timing Specifications
Low range, low gain (RANGE = 0,
HGO = 0)
Low range, high gain (RANGE =
0, HGO = 1)
High range, low gain (RANGE = 1,
HGO = 0)
High range, high gain (RANGE =
1, HGO = 1)
Characteristic
Preliminary — Subject to Change
Symbol
t
t
CSTH
CSTL
25.1666 MHz
39.73
Min
1.0
22
10
—
—
°
C Ambient)
Preliminary Electrical Characteristics
Min
—
—
—
—
25.1666
Max
. It can be directly connected
20
—
—
—
—
Typ
200
400
15
5
1
MHz
Unit
ns
ns
ns
ns
ns
Max
—
—
—
—
Notes
—
—
1
1
2
2
Unit
ms
1-3