MCF51JE128VMB Freescale Semiconductor, MCF51JE128VMB Datasheet - Page 41
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MCF51JE128VMB
Manufacturer Part Number
MCF51JE128VMB
Description
IC MCU 128K COLDF 81-PBGA
Manufacturer
Freescale Semiconductor
Series
MCF51JEr
Datasheet
1.TWR-MCF51JE.pdf
(50 pages)
Specifications of MCF51JE128VMB
Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, SCI, SPI, USB OTG
Peripherals
LVD, PWM, WDT
Number Of I /o
48
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
81-LBGA
Core
ColdFire V1
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SPI, SCI, I2C, USB
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
48
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Package
81MAPBGA
Device Core
ColdFire
Family Name
MCF51JE
Maximum Speed
50.33 MHz
On-chip Adc
8-chx12-bit
On-chip Dac
1-chx12-bit
Number Of Timers
1
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF51JE128VMB
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Freescale Semiconductor
1
2
Num
Refer to
All timing is shown with respect to 20% V DD and 70% V DD , unless noted; 100 pF load on all SPI pins. All timing assumes
slew rate control disabled and high drive strength enabled for SPI output pins.
10
11
12
1
2
3
4
5
6
7
8
9
1
Figure 15
Operating frequency
Cycle time
Enable lead time
Enable lag time
Clock (SPSCK) high time Master and
Slave
Clock (SPSCK) low time Master and
Slave
Data setup time (inputs)
Data hold time (inputs)
Access time, slave
Disable time, slave
Data setup time (outputs)
Data hold time (outputs)
through
Characteristic
Figure
18.
Table 23. SPI Electrical Characteristic
2
Preliminary — Subject to Change
Master
Master
Master
Master
Master
Master
Master
Master
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Symbol
t
t
t
t
t
t
t
t
t
t
SCKH
SCKL
SI(M)
HI(M)
t
t
SI(S)
HI(S)
Lead
Lead
t
t
t
t
SCK
SCK
t
f
f
Lag
Lag
SO
SO
HO
HO
t
dis
op
op
A
1/2 t
1/2 t
f
Bus
SCK
SCK
Min
–10
–10
1/2
1/2
dc
30
30
30
30
25
25
—
—
—
/2048
2
4
0
– 25
– 25
Preliminary Electrical Characteristics
f
f
2048
Max
Bus
Bus
1/2
1/2
40
40
—
—
—
—
—
—
—
—
—
—
—
—
—
/2
/4
Unit
t
t
t
SCK
SCK
Hz
ns
ns
ns
ns
ns
ns
ns
ns
cyc
C
D
D
D
D
D
D
D
D
D
D
D
D
1-4