MCF51JE128VLK Freescale Semiconductor, MCF51JE128VLK Datasheet - Page 11
![IC MCU 128K COLDF 80-LQFP](/photos/39/69/396993/lqfp-80_sml.jpg)
MCF51JE128VLK
Manufacturer Part Number
MCF51JE128VLK
Description
IC MCU 128K COLDF 80-LQFP
Manufacturer
Freescale Semiconductor
Series
MCF51JEr
Datasheet
1.TWR-MCF51JE.pdf
(50 pages)
Specifications of MCF51JE128VLK
Core Processor
Coldfire V1
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, SCI, SPI, USB OTG
Peripherals
LVD, PWM, WDT
Number Of I /o
47
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x12b, D/A 1x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 105°C
Package / Case
80-LQFP
Core
ColdFire V1
Data Bus Width
32 bit
Data Ram Size
32 KB
Interface Type
SPI, SCI, I2C, USB
Maximum Clock Frequency
50 MHz
Number Of Programmable I/os
47
Number Of Timers
2
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Package
80LQFP
Device Core
ColdFire
Family Name
MCF51JE
Maximum Speed
50.33 MHz
On-chip Adc
8-chx12-bit
On-chip Dac
1-chx12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF51JE128VLK
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
2.5
G2
G1
G3
Freescale Semiconductor
B2
C1
C6
C5
C7
B7
C8
D9
E9
H3
D2
D1
C3
E2
E3
D3
E1
H1
H2
K1
K2
F1
F2
F3
L2
L1
Package
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
1
2
3
4
5
6
7
8
9
Pin Assignments
G2
G3
G4
B2
A1
C4
D5
D6
C1
C2
C3
D2
D3
D4
D1
E1
E2
E3
H4
J1
J2
F2
F1
F3
—
—
—
—
—
10
11
15
20
22
24
—
—
—
12
13
14
16
17
18
19
21
23
—
—
1
2
3
4
5
6
7
8
9
Function
DADM2
DADM3
Default
DADP2
DADP3
VREFL
DACO
VSSA
PTG5
PTG6
PTG7
PTH0
PTH1
PTA3
PTA7
PTB0
PTB1
PTA0
PTA1
PTA2
PTA4
PTA5
PTA6
IRO
—
—
—
—
—
—
Alternate
FB_AD19
FB_AD18
FB_RW
KBI1P0
KBI1P1
KBI1P2
FB_OE
FB_D2
FB_D0
BLMS
Table 3. Package Pin Assignments
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1
Preliminary — Subject to Change
Alternate
FB_D6
SS1
RX1
TX1
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2
Alternate
FB_D1
ADP5
ADP4
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3
PTA3/KBI1P2/FB_D6/ADP5
PTA1/KBI1P0/TX1/FB_D1
PTA2/KBI1P1/RX1/ADP4
Composite Pin Name
PTA0/FB_D2/SS1
Pinouts and Pin Assignments
PTG6/FB_AD19
PTG7/FB_AD18
PTG5/FB_RW
PTH0/FB_OE
PTH1/FB_D0
PTB1/BLMS
DADM2
DADM3
DADP3
VREFL
DADP2
DACO
VSSA
PTB0
PTA4
PTA5
PTA6
PTA7
IRO
NC
NC
NC
NC
NC
NC
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