PK10X256VMD100 Freescale Semiconductor, PK10X256VMD100 Datasheet
PK10X256VMD100
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... External watchdog monitor – Software watchdog – Low-leakage wakeup unit This document contains information on a new product. Specifications and information herein are subject to change without notice. © 2010–2011 Freescale Semiconductor, Inc. Preliminary Document Number: K10P144M100SF2 Rev. 5, 5/2011 K10P144M100SF2 • Security and integrity modules – ...
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... UART switching specifications..............................55 6.8.6 SDHC specifications.............................................55 6.8.7 I2S switching specifications..................................56 6.9 Human-machine interfaces (HMI)......................................58 6.9.1 TSI electrical specifications...................................58 7 Dimensions...............................................................................59 7.1 Obtaining package dimensions.........................................59 8 Pinout........................................................................................60 8.1 K10 Signal Multiplexing and Pin Assignments..................60 8.2 K10 Pinouts.......................................................................66 9 Revision History........................................................................68 Preliminary Freescale Semiconductor, Inc. ...
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... Qualification status K## Kinetis family A Key attribute M Flash memory type K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. http://www.freescale.com Description • Fully qualified, general market flow • Prequalification • K10 • Cortex-M4 w/ DSP • Cortex-M4 w/ DSP and FPU • ...
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... LL = 100 LQFP ( mm) • 121 MAPBGA ( mm) • 144 LQFP ( mm) • 144 MAPBGA ( mm) • 196 MAPBGA ( mm) • 256 MAPBGA ( mm) • MHz • MHz • 100 MHz • 120 MHz • 150 MHz • Tape and reel • (Blank) = Trays Preliminary Values Freescale Semiconductor, Inc. ...
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... WP pulldown current 3.3 Definition: Attribute An attribute is a specified value or range of values for a technical characteristic that are guaranteed, regardless of whether you meet the operating requirements. K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. Max. 0.9 1.1 Min. Max. ...
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... Measured characteristic K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 6 Min. — 7 Min. –0.3 1.2 The likelihood of permanent chip failure increases rapidly as soon as a characteristic begins to exceed one of its operating ratings. Operating rating Preliminary Max. Unit pF Max. Unit V Freescale Semiconductor, Inc. ...
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... Typical values are provided as design guidelines and are neither tested nor guaranteed. 3.8.1 Example 1 This is an example of an operating behavior that includes a typical value: K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Normal Limited operating operating range ...
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... Ambient temperature A V 3.3 V supply voltage DD 4 Ratings K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 8 Min. Typ 1.00 1.05 1.10 V (V) DD Description Value 25 3.3 Preliminary Max. Unit 130 µ 150 °C 105 °C 25 °C –40 °C Unit °C V Freescale Semiconductor, Inc. ...
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... Description V Digital supply voltage DD I Digital supply current DD V Digital input voltage (except RESET, EXTAL, and XTAL) DIO K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. –55 — — Min. — Min. -2000 -500 -100 Table continues on the next page... ...
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... V DD — — 0.06 × — Table continues on the next page... Preliminary Min. Max. Unit –0 0 – – –0.3 3.8 V Max. Unit Notes 3.6 V 3.6 V 0.1 V 0.1 V 3.6 V — V — V 0.35 × 0.3 × — — — +5 Freescale Semiconductor, Inc. ...
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... V LVW2L • Level 3 falling (LVWV=10) V LVW3L • Level 4 falling (LVWV=11) V LVW4L K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. -25 — 1.2 TBD through a ESD protection diode. There is no diode SS (=V -0.3V) is observed, then there is no need to provide current limiting ...
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... Table continues on the next page... Preliminary Max. Unit Notes mV TBD V TBD μs Max. Unit Notes TBD V Max. Unit Notes — V — V — V — V 100 mA 0.5 V 0.5 V 0.5 V 0.5 V 100 mA 1 μA 1 TBD μ μA 50 kΩ 2 Freescale Semiconductor, Inc. ...
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... RUN → LLS → RUN • RUN → LLS • LLS → RUN RUN → STOP → RUN • RUN → STOP • STOP → RUN K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. 20 min and Vinput = min and Vinput = V ...
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... TBD — 1.25 Table continues on the next page... Preliminary Max. Unit Notes 4.1 μs 5.8 μs Max. Unit Notes TBD TBD mA TBD mA 3 TBD mA TBD mA 4 TBD mA TBD mA TBD mA TBD mA 2 TBD mA 5 TBD mA TBD mA TBD mA TBD mA 6 Freescale Semiconductor, Inc. ...
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... FlexBus and flash clock. MCG configured for FEI mode MHz core, system, FlexBus, and bus clock and 1MHz flash clock. MCG configured for BLPE mode. All peripheral clocks disabled. Code executing from flash. K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. Typ. Max. ...
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... LVD disabled • No GPIOs toggled • Code execution from flash Figure 1. Run mode supply current vs. core frequency — all peripheral clocks disabled The following data was measured under these conditions: K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 16 Preliminary Freescale Semiconductor, Inc. ...
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... All peripheral clocks enabled but peripherals are not in active operation • LVD disabled • No GPIOs toggled • Code execution from flash Figure 2. Run mode supply current vs. core frequency — all peripheral clocks enabled K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Preliminary General 17 ...
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... K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 18 Frequency band (MHz) 0.15–50 50–150 150–500 500–1000 0.15–1000 = 96 MHz SYS Table 8. Capacitance attributes Preliminary Typ. Unit Notes TBD dBμ TBD dBμV TBD dBμV TBD dBμV TBD — Min. Max. Unit — — Freescale Semiconductor, Inc. ...
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... Asynchronous path External reset pulse width (digital glitch filter disabled) Mode select (EZP_CS) hold time after reset deassertion K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. Normal run mode — — — ...
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... Die junction temperature J T Ambient temperature A K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 20 Min. Max. — 12 — TBD — 36 — TBD — 32 — TBD — 36 — TBD Min. –40 –40 Preliminary Unit Notes Max. Unit 125 °C 105 °C Freescale Semiconductor, Inc. ...
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... Determined according to JEDEC Standard JESD51-2, Integrated Circuits Thermal Test Method Environmental Conditions—Natural Convection (Still Air). 6 Peripheral operating requirements and behaviors All digital I/O switching characteristics assume: K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 144 LQFP 144 Unit ...
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... Clock and data fall time f T Data setup s T Data hold h Figure 3. TRACE_CLKOUT specifications TRACE_CLKOUT TRACE_D[3:0] Figure 4. Trace data specifications K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 22 Min. Frequency dependent 2 2 — — Preliminary Max. Unit MHz — ns — — ns — Freescale Semiconductor, Inc. ...
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... TCLK frequency of operation • Boundary Scan • JTAG and CJTAG • Serial Wire Debug J2 TCLK cycle period K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Table continues on the next page... Preliminary Min. Max. Unit 2 ...
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... TCLK (input) K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011 Figure 5. Test clock input timing Preliminary Min. Max. Unit 50 — — ns 12.5 — ns — — — ns — — — ns 1.4 — ns — 22.1 ns — 22.1 ns 100 — — Freescale Semiconductor, Inc. ...
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... Data outputs Data outputs Data outputs Figure 6. Boundary scan (JTAG) timing TCLK TDI/TMS TDO TDO TDO K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors J11 J12 J11 Figure 7. Test Access Port timing Preliminary ...
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... Table continues on the next page... Preliminary Max. Unit Notes — kHz — 39.0625 kHz — µA 4 µs 1 ± 0 dco ± 0 dco ± 3 dco ± TBD %f 2 dco — 4 MHz — 5 MHz Freescale Semiconductor, Inc. ...
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... MHz, VDIV multiplier = 48) I PLL operating current pll • PLL @ 48 MHz (f osc_hi_1 2 MHz, VDIV multiplier = 24) f PLL reference frequency range pll_ref K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. — TBD — TBD (3/ ints_t (16/5) x ...
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... Min. Typ. 1.71 — Table continues on the next page... Preliminary Max. Unit Notes 10 — ps — — ps — ps ± 2.98 % ± 5. 1075( pll_ref Max. Unit Notes 3.6 V Freescale Semiconductor, Inc. ...
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... Series resistor — low-frequency, high-gain mode (HGO=1) Series resistor — high-frequency, low-power mode (HGO=0) Series resistor — high-frequency, high-gain mode (HGO=1) K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — 500 — ...
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... F Min — 40 — — — — Preliminary Typ. Max. Unit Notes 0.6 — — 0.6 — — Typ. Max. Unit Notes — 40 kHz — 8 MHz — 32 MHz — 50 MHz 750 — 250 — ms 0.6 — — ms Freescale Semiconductor, Inc ...
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... Flash timing specifications — program and erase The following specifications represent the amount of time the internal charge pumps are active and do not include command overhead. K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. ...
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... TBD — 320 1600 — — 35 — TBD TBD — TBD TBD — TBD TBD — TBD TBD Preliminary Unit Notes μ Unit Notes ms μs 1 μs 1 μs 1 μ μs 1 μ μs 1 μs μs μs μs Freescale Semiconductor, Inc. ...
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... EZP_CK high to EZP_D input invalid (hold) EP7 EZP_CK low to EZP_Q output valid (setup) EP8 EZP_CK low to EZP_Q output invalid (hold) EP9 EZP_CS negation to EZP_Q tri-state K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Typ. 10 Min. Max. 1 Typ. ...
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... FB_TS. K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 34 EP3 EP2 EP4 EP9 EP7 EP8 EP5 EP6 Figure 9. EzPort Timing Diagram Min. 2.7 — 20 — 0.5 8.5 0.5 Preliminary Max. Unit Notes 3 MHz — — — — Freescale Semiconductor, Inc. ...
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... Data and FB_TA input hold 1. Specification is valid for all FB_AD[31:0], FB_BE/BWEn, FB_CSn, FB_OE, FB_R/W,FB_TBST, FB_TSIZ[1:0], FB_ALE, and FB_TS. 2. Specification is valid for all FB_AD[31:0] and FB_TA. K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Max. 1.71 3.6 — ...
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... FB_A[Y] FB2 FB_D[X] Address FB_RW FB_TS FB_ALE FB_CSn FB_OEn FB_BEn FB_TA FB_TSIZ[1:0] Figure 10. FlexBus read timing diagram K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 36 FB3 FB5 Address FB4 Data AA=1 AA=0 FB4 FB5 AA=1 AA=0 TSIZ Preliminary Freescale Semiconductor, Inc. ...
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... Figure 11. FlexBus write timing diagram 6.5 Security and integrity modules There are no specifications necessary for the device's security and integrity modules. 6.6 Analog K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors FB3 Address Data ...
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... Table continues on the next page... Preliminary are achievable on the Table 29 and Max. Unit Notes 3.6 V +100 mV 2 +100 DDA V V SSA V V REFH kΩ kΩ 4 18.0 MHz 5 12.0 MHz Freescale Semiconductor, Inc. ...
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... For guidelines and examples of conversion rate calculation please download the ADC calculator tool http:// cache.freescale.com/files/soft_dev_tools/software/app_software/converters/ADC_CALCULATOR_CNV.zip?fpsp Figure 12. ADC input impedance equivalency diagram K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1 Max. Typ. 20.000 — ...
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... Max hardware averaging (AVGE = %1, AVGS = %11) ±TBD ADC 4 LSB conversion ±0.5 clock <12MHz, Max hardware averaging (AVGE = %1, AVGS = %11) ±TBD Max 4 LSB averaging ±TBD ±TBD LSB ADIN V DDA ±TBD — 4 LSB ±0.5 5 — bits — bits — — bits bits Freescale Semiconductor, Inc. ...
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... Figure TBD Figure 13. Typical TUE vs. ADC conversion rate 12-bit single-ended mode Figure TBD Figure 14. Typical ENOB vs. Averaging for 16-bit differential and 16-bit single-ended K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors = REFH DDA ...
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... MHz unless otherwise stated. Typical values are for ADCK /2 PGAD Preliminary Unit Notes kΩ 4 IN+ to IN- Ω 5 µs 6 Ksps 7 Ksps 8 causes drop AS Freescale Semiconductor, Inc. ...
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... Offset drift over Gain=1 OFS temperature dG/dV Gain drift over • Gain=1 DDA supply voltage • Gain=64 K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. Typ. — 420 =1.2V, — 1.54 REFPGA =1.2V, — ...
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... Average=32, f =500Hz in — dB 16-bit differential — dB mode, Average=32, f =500Hz in — bits 16-bit differential — bits mode,f =100H in — bits z — bits — bits — bits — bits — bits — bits — bits — bits dB Freescale Semiconductor, Inc. ...
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... Comparator initialization delay is defined as the time between software writes to change control inputs (Writes to DACEN, VRSEL, PSEL, MSEL, VOSEL) and the comparator output settling to a stable level LSB = V /64 reference K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. 1.71 — — ...
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... Figure 15. Typical hysteresis vs. Vin level (VDD=3.3V, PMODE=0) K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011 1.3 1.6 1.9 2.2 Vin level (V) Preliminary HYSTCTR S etting 2.5 2.8 3.1 Freescale Semiconductor, Inc. ...
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... The DAC reference can be selected to be VDDA or the voltage output of the VREF module (VREF_OUT small load capacitance (47 pF) can improve the bandwidth performance of the DAC K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors 1 1 ...
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... LSB — ±1 LSB ±0.4 ±0.8 %FSR ±0.1 ±0.6 %FSR 90 dB 3.7 — μV/C TBD — ppm of FSR/C — TBD μV/yr — 250 Ω V/μs 1.7 — 0.12 — — -80 dB kHz — — — — Freescale Semiconductor, Inc ...
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... VDDA = 3.0V, reference select set for VDDA (DACx_CO:DACRFS = 1), high power mode(DACx_C0:LPEN = 0), DAC set to 0x800, Temp range from -40C to 105C Figure 17. Typical INL error vs. digital code K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Preliminary 49 ...
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... V and temperature=25C DDA K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 50 Min. 1.71 −40 — Min. Typ. TBD 1.2 Table continues on the next page... Preliminary Max. Unit Notes 3.6 V 105 °C 100 nF Max. Unit Notes TBD V Freescale Semiconductor, Inc. ...
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... Voltage reference output with factory trim out TBD Figure 19. Typical output vs.temperature TBD 6.7 Timers See General switching specifications. K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Min. TBD 1.198 — — — — — ...
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... The delay is programmable in SPIx_CTARn[PASC] and SPIx_CTARn[ASC]. K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 52 Min. Max. 1.71 3.6 — 12 — BUS (t / SCK SCK/ − — BUS − — BUS 4 — — 15 — 0 — Preliminary Unit Notes V 1 MHz Freescale Semiconductor, Inc. ...
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... DSPI_SS inactive to DSPI_SOUT not driven DSPI_SS DSPI_SCK (CPOL=0) DSPI_SOUT DS13 DSPI_SIN Figure 22. DSPI classic SPI timing — slave mode K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors DS1 DS2 DS8 Data Last data First data DS5 ...
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... Last data First data DS5 DS6 First data Data Last data Description Table continues on the next page... Preliminary Max. Unit Notes 3 MHz — / SCK — — 8.5 ns — ns — ns — ns DS4 Min. Max. Unit 2.7 3.6 V 12.5 MHz Freescale Semiconductor, Inc. ...
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... C switching specifications See General switching specifications. 6.8.5 UART switching specifications See General switching specifications. K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors Description DS10 DS15 DS12 First data Data DS14 First data ...
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... K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 56 Card input clock SD3 SD2 SD1 SD6 SD7 SD8 Figure 25. SDHC timing Preliminary Min. Max. Unit 2.7 3 400 kHz 0 25 MHz 0 20 MHz 0 400 kHz 7 — — ns — — 6 — — ns Freescale Semiconductor, Inc. ...
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... I2S_RXD/I2S_FS input hold after I2S_BCLK I2S_MCLK (output) I2S_BCLK (output I2S_FS (output) I2S_FS (input) S7 I2S_TXD I2S_RXD Figure 26. I K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Peripheral operating requirements and behaviors master (clocks driven) and slave 2 S master mode timing ...
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... Table continues on the next page... Preliminary Min. Max. Unit 2.7 3 — ns SYS 45% 55% MCLK period 10 — — ns — — — — ns S16 S14 S16 Typ. Max. Unit Notes — 3 500 pF 5.5 TBD MHz 0.5 TBD MHz Freescale Semiconductor, Inc ...
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... Data is captured with an average of 7 periods window. 7 Dimensions 7.1 Obtaining package dimensions Package dimensions are provided in package drawings. To find a package drawing search for the drawing’s document number: K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Min. Typ. TBD 1 TBD 600 — ...
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... SDHC0_CM S_b D PTE4 SPI1_PCS0 UART3_TX SDHC0_D3 PTE5 SPI1_PCS2 UART3_RX SDHC0_D2 PTE6 SPI1_PCS3 UART3_CT I2S0_MCLK S_b PTE7 UART3_RT I2S0_RXD S_b PTE8 UART5_TX I2S0_RX_F S PTE9 UART5_RX I2S0_RX_B CLK PTE10 UART5_CT I2S0_TXD S_b Preliminary ALT5 ALT6 ALT7 EzPort I2C1_SDA I2C1_SCL I2S0_CLKIN Freescale Semiconductor, Inc. ...
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... CMP1_IN2/ CMP1_IN2/ CMP1_IN2/ ADC0_SE2 ADC0_SE2 ADC0_SE2 VREF_OUT/ VREF_OUT/ VREF_OUT/ CMP1_IN5/ CMP1_IN5/ CMP1_IN5/ K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTE11 UART5_RT I2S0_TX_F S_b S PTE12 I2S0_TX_B CLK PTE16 SPI0_PCS0 UART2_TX FTM_CLKIN 0 PTE17 SPI0_SCK UART2_RX FTM_CLKIN ...
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... UART0_RT FTM0_CH0 S_b PTA4 FTM0_CH1 PTA5 FTM0_CH2 PTA6 FTM0_CH3 PTA7 FTM0_CH4 Preliminary ALT5 ALT6 ALT7 EzPort EWM_OUT _b EWM_IN RTC_CLKO UT JTAG_TCL EZP_CLK K/ SWD_CLK JTAG_TDI EZP_DI JTAG_TDO/ EZP_DO TRACE_SW O JTAG_TMS/ SWD_DIO NMI_b EZP_CS_b CMP2_OUT I2S0_RX_B JTAG_TRS CLK T TRACE_CL KOUT TRACE_D3 Freescale Semiconductor, Inc. ...
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... TSI0_CH6 83 G12 PTB2 / / ADC0_SE1 ADC0_SE1 2/TSI0_CH7 2/TSI0_CH7 84 G11 PTB3 / / ADC0_SE1 ADC0_SE1 3/TSI0_CH8 3/TSI0_CH8 K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTA8 FTM1_CH0 PTA9 FTM1_CH1 PTA10 FTM2_CH0 PTA11 FTM2_CH1 PTA12 CAN0_TX FTM1_CH0 PTA13 CAN0_RX ...
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... SPI0_PCS2 UART1_CT FTM0_CH1 S_b Preliminary ALT5 ALT6 ALT7 EzPort FTM1_FLT0 FTM2_FLT0 FB_AD23 FB_AD22 FB_AD21 FB_AD20 FB_AD19 FTM0_FLT1 FB_AD18 FTM0_FLT2 FB_AD17 EWM_IN FB_AD16 EWM_OUT _b FB_AD15 FTM2_QD_ PHA FB_OE_b FTM2_QD_ PHB FB_AD31 CMP0_OUT FB_AD30 CMP1_OUT FB_AD29 CMP2_OUT FB_AD28 FB_AD14 FB_AD13 FB_AD12 Freescale Semiconductor, Inc. ...
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... VDD VDD VDD 123 A6 PTC16 124 D5 PTC17 125 C5 PTC18 K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. ALT1 ALT2 ALT3 ALT4 PTC3 SPI0_PCS1 UART1_RX FTM0_CH2 PTC4 SPI0_PCS0 UART1_TX FTM0_CH3 PTC5 SPI0_SCK LPT0_ALT2 FB_AD10 PTC6 SPI0_SOUT PDB0_EXT ...
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... SPI2_SOUT SDHC0_D5 PTD14 SPI2_SIN SDHC0_D6 PTD15 SPI2_PCS1 SDHC0_D7 Preliminary ALT5 ALT6 ALT7 EzPort FB_CS3_b/ FB_TA_b FB_BE7_0_ BLS31_24_ b FB_ALE/ FB_CS1_b/ FB_TS_b FB_CS0_b FB_AD4 FB_AD3 FB_AD2 EWM_IN FB_AD1 EWM_OUT _b FB_AD0 FTM0_FLT0 FTM0_FLT1 FB_A16 FB_A17 FB_A18 FB_A19 FB_A20 FB_A21 FB_A22 FB_A23 Freescale Semiconductor, Inc. ...
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... PGA1_DM/ADC1_DM0/ADC0_DM3 30 VDDA 31 VREFH 32 VREFL 33 VSSA 34 ADC1_SE16/CMP2_IN2/ADC0_SE22 35 ADC0_SE16/CMP1_IN2/ADC0_SE21 36 Figure 28. K10 144 LQFP Pinout Diagram K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. Preliminary Pinout 108 VDD 107 VSS 106 PTC3 105 PTC2 104 PTC1 103 PTC0 102 PTB23 101 ...
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... PTB23 PTB22 D PTB21 PTB20 PTB19 PTB18 E PTB17 PTB16 PTB11 PTB10 F PTB9 PTB8 PTB7 PTB6 G PTB5 PTB4 PTB3 PTB2 H PTB1 PTB0 PTA29 PTA28 J PTA13 PTA27 PTA26 PTA25 K PTA12 PTA16 PTA17 PTA24 L PTA11 PTA14 PTA15 RESET_b M PTA10 VSS PTA19 PTA18 Freescale Semiconductor, Inc. ...
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... Changed Reference oscillator current source base current spec and added Low- power current adder footer in "TSI electrical specifications" table K10 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. Freescale Semiconductor, Inc. footnote in "Voltage and Current Operating Requirements" table. IC spec in "Power consumption operating behaviors" table ...
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... Freescale Semiconductor makes no warranty, representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Freescale Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any liability, including without limitation consequential or incidental damages. "Typical" parameters that may be provided in Freescale Semiconductor data sheets and/or specifications can and do vary in different applications and actual performance may vary over time ...