PK20X256VLQ100 Freescale Semiconductor, PK20X256VLQ100 Datasheet - Page 56

• Manufacturer Part Number: PK20X256VLQ100
• Description: IC ARM CORTEX MCU 256K 144-LQFP
• Manufacturer: Freescale Semiconductor
• Series: Kinetisr

Specifications of PK20X256VLQ100

• Core Processor: ARM Cortex-M4
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SDHC, SPI, UART/USART, USB, USB OTG
• Peripherals: DMA, I²S, LVD, POR, PWM, WDT
• Number Of I /o: 100
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.71 V ~ 3.6 V
• Data Converters: A/D 33x16b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Peripheral operating requirements and behaviors
1. Operating in pass-through mode: regulator output voltage equal to the input voltage minus a drop proportional to I
6.8.4 CAN switching specifications
See
6.8.5 DSPI switching specifications (low-speed mode)
The DMA Serial Peripheral Interface (DSPI) provides a synchronous serial bus with
master and slave operations. Many of the transfer attributes are programmable. The tables
below provides DSPI timing characteristics for classic SPI timing modes. Refer to the
DSPI chapter of the Reference Manual for information on the modified transfer formats
used for communicating with slower peripheral devices.
1. The DSPI module can operate across the entire operating voltage for the processor, but to run across the full voltage
56
V
Symbol
Reg33out
C
range the maximum frequency of operation is reduced.
ESR
I
Num
DS1
DS2
DS3
DS4
DS5
DS6
DS7
DS8
LIM
OUT
General switching
Regulator output voltage — Input supply
(VREGIN) < 3.6 V, pass-through mode
External output capacitor
External output capacitor equivalent series
resistance
Current limitation threshold
Description
Operating voltage
Frequency of operation
DSPI_SCK output cycle time
DSPI_SCK output high/low time
DSPI_PCSn to DSPI_SCK output valid
DSPI_SCK to DSPI_PCSn output hold
DSPI_SCK to DSPI_SOUT valid
DSPI_SCK to DSPI_SOUT invalid
DSPI_SIN to DSPI_SCK input setup
DSPI_SCK to DSPI_SIN input hold
Table 36. USB VREG electrical specifications
Table 37. Master mode DSPI timing (low-speed mode)
K20 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
specifications.
Description
(continued)
Preliminary
1.76
Min.
185
2.3
1
(t
(t
(t
4 x t
SCK
SCK
SCK
1.71
Min.
15
—
—
-2
0
/2) - 4
/2) - 4
/2) - 4
BCLK
Typ.
290
2.2
—
—
(t
SCK/2)
Max.
12.5
3.6
10
—
—
—
—
—
—
Max.
8.16
100
395
3.6
+ 4
Freescale Semiconductor, Inc.
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
V
Unit
mΩ
mA
μF
V
Notes
Load
Notes
1
1
.