73S8014R-IL/F Maxim Integrated Products, 73S8014R-IL/F Datasheet
73S8014R-IL/F
Specifications of 73S8014R-IL/F
Related parts for 73S8014R-IL/F
73S8014R-IL/F Summary of contents
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... Simplifying System Integration™ DESCRIPTION The Teridian 73S8014R is a single smart card (ICC) interface circuit, firmware compatible with 8024-type devices for configurations where only asynchronous cards must be supported derived from the 73S8024RN industry- standard electrical interface. The 73S8014R has been optimized to match most of the typical Set-Top-Box / A/V Conditional Access applications ...
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... GND 2 VDD FAULT bias currents R-C CONTROLLER OSC. 1.5MHz AND REGISTERS FAULT LOGIC SEQUENCER CLOCK CLOCK GENERATION SMART CARD I/O BUFFER Figure 1: 73S8014R Block Diagram VPC VCC FAULT vref LDO REGULATOR RESET BUFFER SC CLOCK BUFFER vcc circuits GND VCC RST CLK ...
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... Characteristics: Digital Signals.................................................................................................................. 11 2.6 DC Characteristics .................................................................................................................................... 12 2.7 Voltage Fault Detection Circuits ................................................................................................................ 13 3 Applications Information ............................................................................................................................... 14 3.1 Example 73S8014R Schematics .............................................................................................................. 14 3.2 System Controller Interface ....................................................................................................................... 16 3.3 Power Supply and Voltage Supervision .................................................................................................... 16 3.4 Card Power Supply ................................................................................................................................... 17 3.5 On-Chip Oscillator and Card Clock ........................................................................................................... 17 ...
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... Figure 16: General Input Circuit .............................................................................................................................. 25 Figure 17: Oscillator Circuit ..................................................................................................................................... 25 Figure 18: VDDF_ADJ ............................................................................................................................................. 26 Figure 19: Mechanical Drawing 20-Pin SO Package .............................................................................................. 27 Tables Table 1: 73S8014R 20-Pin SOP Pin Definitions ....................................................................................................... 6 Table 2: Absolute Maximum Device Ratings ............................................................................................................. 8 Table 3: Recommended Operating Conditions ......................................................................................................... 8 Table 4: Package Thermal Parameters ..................................................................................................................... 9 Table 5: DC Smart Card Interface Requirements ..................................................................................................... 9 Table 6: Digital Signals Characteristics ................................................................................................................... 11 Table 7: DC Characteristics ...
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... DS_8014R_012 1 Pinout The 73S8014R is supplied as a 20-pin SO package. OFF RSTIN I/OUC VPC CLKDIV2 CMDVCC 5V/#V GND XTALIN XTALOUT Rev. 1 73S8014R Figure 2: 73S8014R 20-SOP Pin Out 73S8014R Data Sheet CLKDIV1 20 PRES 19 VCC 18 CLK 17 GND 16 RST 15 I/O 14 VDD 13 VDDF_ADJ 12 GND 11 5 ...
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... Table 1 provides the 73S8014R pin names, pin numbers, type, equivalent circuits and descriptions. Pin Pin Name Number Type Card Interface I RST 15 O CLK 17 O PRES 19 I VCC 18 PSO GND 16 GND Host Processor Interface CMDVCC 6 I 5V/# CLKDIV1 20 I CLKDIV2 5 OFF 1 O RSTIN ...
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... DD Figure 18 the V value (that controls deactivation of the card). Must be DDF left open if unused. System interface supply voltage and supply voltage for internal Figure 11 circuitry. Figure 11 LDO regulator power supply source. – Digital ground. 73S8014R Data Sheet 7 ...
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... Voltage Fault Detection Circuits 2.1 Absolute Maximum Ratings Table 2 lists the maximum operating conditions for the 73S8014R. Permanent device damage may occur if absolute maximum ratings are exceeded. Exposure to the extremes of the absolute maximum rating for extended periods may affect device reliability. The smart card interface pins are protected against short circuits to V ground, and each other ...
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... DS_8014R_012 2.3 Package Thermal Parameters Table 4 lists the 73S8014R Smart Card interface requirements. Parameter 20 SO 2.4 Smart Card Interface Requirements Table 5 lists the 73S8014R Smart Card interface requirements. Table 5: DC Smart Card Interface Requirements Symbol Parameter Card Power Supply (V ) Regulator CC ° ...
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Symbol Parameter Interface Requirements – Data Signals: I/Oand host interfaces: I/OUC and V requirements do not pertain to I/OUC. SHORTL SHORTH INACT Output level, high (I/ Output level, high (I/OUC) Output level, low (I/O) ...
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... CLK slew rate SR5V Output rise time, fall time R F δ Duty cycle for CLK 2.5 Characteristics: Digital Signals Table 6 lists the 73S8014R digital signals characteristics. Symbol Parameter Digital I/O except for XTALIN and XTALOUT V Input Low Voltage IL V Input High Voltage IH ...
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... Input High Voltage - XTALIN IHXTAL Input Current - I ILXTAL XTALIN Max freq. Osc or external f MAX clock δin External input duty cycle limit 2.6 DC Characteristics Table 7 lists the 73S8014R DC characteristics. Symbol Parameter I DD Supply Current I Supply Current PC V supply current when PC I PCOFF ...
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... DS_8014R_012 2.7 Voltage Fault Detection Circuits Table 8 lists the 73S8014R Voltage Fault Detection Circuits. Symbol Parameter V fault Voltage supervisor DDF DD threshold) V fault Voltage supervisor CCF CC threshold) Rev. 1.0 Table 8: Voltage Fault Detection Circuits Condition No external resistor on VDDF_ADJ pin 73S8014R Data Sheet ...
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... Related Documentation 3.1 Example 73S8014R Schematics Figure 3 shows a typical application schematic for the implementation of the 73S8014R. Note that minor changes may occur to the reference material from time to time and the reader is encouraged to contact Teridian for the latest information. 14 provide more detailed information. ...
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... XTALIN 22pF C2 10 XTALOUT Y1 CRYSTAL 73S8014R C3 22pF See NOTE 4 R2 47K VDD R4 10K Card detection switch is normally open Smart Card Connector Figure 3: 73S8014R – Typical Application Schematic 73S8014R Data Sheet See note 5 VDD R3 20 Rext2 CLKDIV1 19 PRES 18 VCC 17 CLK 16 GND 15 RST 14 ...
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... The 73S8014R smart card interface IC incorporates a LDO voltage regulator. The voltage output is controlled by the digital input 5V/#V of the 73S8014R. This regulator is able to provide either card voltage from the power supply applied on the VPC pin. The voltage regulator can provide a current of at least 65mA on VCC for both 3V and 5V that complies with EMV 4 ...
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... The type of capacitor should be an X5R/X7R with ERS<100 3.5 On-Chip Oscillator and Card Clock The 73S8014R device has an on-chip oscillator that can generate the smart card clock using an external crystal (connected between the pins XTALIN and XTALOUT) to set the oscillator frequency. When the clock signal is available from another source, it can be connected to the pin XTALIN, and the pin XTALOUT should be left unconnected ...
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... Activation Sequence The 73S8014R smart card interface ICs have an internal 10ms delay on the application of VDD where VDD > activation is allowed during this 10ms period. The CMDVCC (edge triggered) signal must then be set V DDF low to activate the card. In order to initiate activation, the card must be present; there can be no VDD fault. ...
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CMDVCC VCC I/O CLK RSTIN RST t = 0.510 ms (timing by 1.5MHz internal oscillator, I/O goes to reception state RSTIN goes low and CLK becomes active > 0.5μs, CLK active, RST to become ...
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Fault Detection and OFF There are two different cases that the system controller can monitor the OFF signal: to query regarding the card presence outside card sessions, or for fault detection during card sessions. Outside a card session: In ...
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I/O I/OUC Delay from I/O to I/OUC: Delay from I/OUC to I/O: Rev. 1.0 Neutral State I/O reception Yes I/O & not I/OUC No I/OUC No & not I/O Yes I/OUC in I/OUC yes Figure 8: I/O and I/OUC State ...
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Equivalent Circuits This section provides illustrations of circuits equivalent to those described in the pinout section. Figure 11: Power Input/Output Circuit, VDD, VPC, VCC 22 VDD Output Disable 20K Data From circuit STRONG NFET Figure 10: Open Drain type ...
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From circuit From circuit Rev. 1.0 Figure 12: Smart Card CLK Driver Circuit Figure 13: Smart Card RST Driver Circuit VCC VERY STRONG ESD PFET CLK PIN ESD VERY STRONG NFET VCC STRONG ESD PFET RST PIN ESD STRONG NFET ...
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From circuit To circuit From circuit To circuit 24 STRONG 400ns DELAY STRONG Figure 14: Smart Card IO Interface Circuit STRONG 400ns DELAY STRONG Figure 15: Smart Card IOUC Interface Circuit VCC ESD RL=11K PFET IO PIN NFET ESD VDD ...
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Pull-up Disable To circuit Pull-down Enable Note: Pins CMDVCC,5V/#V, CLKDIV1 and CLKDIV2 have the pull-up enabled. Pins RSTIN, CLKIN, PRES have the pull-down enabled. XTALIN PIN Rev. 1.0 VERY WEAK PFET Figure 16: General Input Circuit VDD STRONG ENABLEB VERY ...
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R = 40k R = 60k 26 VDD FAULT VREF = 1.400v DETECTION + - R = 0.4k (approx.) Figure 18: VDDF_ADJ VDD PIN ESD VDDF_ ESD ADJ PIN ESD Rev. 1.0 ...
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Mechanical Drawing Inches (mm) 0.016(.406) Detail A Figure 19: Mechanical Drawing 20-Pin SO Package Rev. 1.0 + .005(.127) 0.5050(12.82) - .009(.228) + .005(.127) - .009(.228) 0.5050(12.82) + .004(.101) 0.050(1.27) - .003(.076) TYP 0°- 8° BASE PLANE SEATING PLANE ± ...
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... For more information about Teridian Semiconductor products or to check the availability of the 73S8014R, contact us at: 6440 Oak Canyon Road Irvine, CA 92618-5201 Telephone: (714) 508-8800 FAX: (714) 508-8878 Email: scr.support@teridian.com For a complete list of worldwide sales offices http://www.teridian.com. 28 Table 9: Order Numbers and Packaging Marks Order Number 73S8014R-IL/F 73S8014R-ILR/F Packaging Mark 73S8014R 73S8014R Rev. 1.0 ...
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Revision History Revision Date 1.0 9/3/2008 First publication. © 2008 Teridian Semiconductor Corporation. All rights reserved. Teridian Semiconductor Corporation is a registered trademark of Teridian Semiconductor Corporation. Simplifying System Integration is a trademark of Teridian Semiconductor Corporation. All other trademarks ...