CP2110-F01-GM Silicon Laboratories Inc, CP2110-F01-GM Datasheet - Page 8

IC HID USB-TO-UART BRIDGE 24QFN

CP2110-F01-GM

Manufacturer Part Number
CP2110-F01-GM
Description
IC HID USB-TO-UART BRIDGE 24QFN
Manufacturer
Silicon Laboratories Inc
Datasheets

Specifications of CP2110-F01-GM

Package / Case
24-WFQFN Exposed Pad
Applications
UART-to-USB Bridge
Interface
UART, USB
Voltage - Supply
1.8V, 3 V ~ 3.6 V
Mounting Type
Surface Mount
Input Voltage Range (max)
3.6 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Supply Current (max)
18.5 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-2003 - KIT EVAL FOR CP2110
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-2006-5

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CP2110-F01-GM
Manufacturer:
ST
Quantity:
12 000
Part Number:
CP2110-F01-GMR
Manufacturer:
SILICON LABS/芯科
Quantity:
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CP2110
3. Pinout and Package Definitions
8
*Note: Pins can be left unconnected when not used.
GPIO.0
GPIO.1
GPIO.2
GPIO.3
GPIO.4
REGIN
RS485
Name
VBUS
GND
RST
RTS
CTS
CLK
TXT
V
V
V
RX
D+
D–
TX
DD
PP
IO
Pin #
16*
24*
23*
22*
19*
21
20
1*
6
5
2
9
7
8
3
4
Power Out
Power In
Power In I/O Supply Voltage Input.
Power In 5 V Regulator Input. This pin is the input to the on-chip voltage regulator.
Special
D Out
D Out
D Out
D Out
D Out
Type
D I/O
D I/O
D I/O
D I/O
D I/O
D I/O
D I/O
D I/O
D In
D In
D In
Power Supply Voltage Input.
Voltage Regulator Output. See Section 9.
Ground. Must be tied to ground.
Device Reset. Open-drain output of internal POR or V
source can initiate a system reset by driving this pin low for the time specified
in Table 4.
VBUS Sense Input. This pin should be connected to the VBUS signal of a
USB network.
Connect 4.7 F capacitor between this pin and ground to support ROM
programming via the USB interface.
USB D+
USB D–
Asynchronous data output (UART Transmit) for the UART Interface.
Asynchronous data input (UART Receive) for the UART Interface.
In GPIO mode, this pin is a user-configurable input or output.
In CLK mode, this pin outputs a configurable frequency clock signal.
In GPIO mode, this pin is a user-configurable input or output.
In hardware flow control mode, this pin is the Ready To Send control output
(active low) for the UART interface.
In GPIO mode, this pin is a user-configurable input or output.
In hardware flow control mode, this pin is the Clear To Send control input
(active low) for the UART interface.
In GPIO mode, this pin is a user-configurable input or output.
In RS-485 mode, this pin is the transmit active pin for the RS-485 transceiver.
In GPIO mode, this pin is a user-configurable input or output.
In TXT mode, this pin is the Transmit Toggle pin and toggles to indicate UART
transmission. The pin is logic high when a transmission is not in progress.
Table 7. CP2110 Pin Definitions
Rev. 1.0
Description
DD
monitor. An external

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