WM8740SEDS/V Wolfson Microelectronics, WM8740SEDS/V Datasheet - Page 17
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WM8740SEDS/V
Manufacturer Part Number
WM8740SEDS/V
Description
Audio D/A Converter ICs Stereo DAC High End
Manufacturer
Wolfson Microelectronics
Datasheet
1.WM8740SEDSV.pdf
(27 pages)
Specifications of WM8740SEDS/V
Resolution
24 bit
Operating Supply Voltage
5 V
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Number Of Dac Outputs
4
Number Of Dacs
2
Snr
116 dB
Supply Current
19 mA
Thd Plus Noise
- 104 dB
Package / Case
SSOP-28
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
WM8740
w
Table 7 Attenuation Control Level
Bit 2 in Reg3 is used to control the attenuator (ATC). When ATC is “high”, the attenuation data
loaded in program register 0 is used for both the left and the right channels. When ATC is low, the
attenuation data for each register is applied separately to left and right channels.
SOFT MUTE
Table 8 Soft Mute
Setting MUT causes the attenuation to ramp from the current value down to 00. The values held in
the attenuation registers are unchanged. When MUT is reset the attenuation will ramp back up to the
previous value. The ramp rate is 128/fs s/0.5dB step.
DIGITAL DE-EMPHASIS
Table 9 Digital De-Emphasis
DAC OPERATION ENABLE
Table 10 DAC Operation Enable
AUDIO DATA INPUT FORMAT
Table 11 Audio Data Input Format
(REG3, B0)
(REG2, B0)
(REG2, B1)
(REG2,B2)
I2S
0
0
0
0
1
1
1
1
MUT
DEM
OPE
H
H
H
L
L
L
FD(hex)
FE(hex)
FF(hex)
00(hex)
01(hex)
X[7:0]
:
:
(REG2, B4)
Soft Mute off (normal operation)
Soft Mute on (no output)
De-emphasis off
De-emphasis on
Normal operation
DAC output forced to bipolar zero,
irrespective of input data.
IW1
0
0
1
1
0
0
1
1
(REG2, B3)
ATTENUATION LEVEL
IW0
0
1
0
1
0
1
0
1
- ∞dB (mute)
-127.0dB
-1.0dB
-0.5dB
0.0dB
:
:
AUDIO INTERFACE
16-bit standard right justified
20-bit standard right justified
24-bit standard right justified
24-bit left justified (MSB first)
16-bit I
24-bit I
20-bit I
20-bit left justified (MSB first)
2
2
2
S
S
S
PD, Rev 4.4, April 2010
Production Data
17