M24LR64-RMR6T/2 STMicroelectronics, M24LR64-RMR6T/2 Datasheet - Page 4

EEPROM Dual Interface 64k EEPROM ISO15693-I2C

M24LR64-RMR6T/2

Manufacturer Part Number
M24LR64-RMR6T/2
Description
EEPROM Dual Interface 64k EEPROM ISO15693-I2C
Manufacturer
STMicroelectronics
Datasheet

Specifications of M24LR64-RMR6T/2

Organization
2 K x 32
Interface Type
I2C
Maximum Clock Frequency
400 KHz
Access Time
900 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Maximum Operating Current
600 uA
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Memory Size
64 KB
Package / Case
DFPN-8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
User memory organization
2
4/10
User memory organization
The M24LR64-R is divided into 64 sectors of 32 blocks of 32 bits.
memory sector organization. Each sector can be individually read- and/or write-protected
using a specific password command. Read and write operations are possible if the
addressed data are not in a protected sector.
The M24LR64-R also has a 64-bit block that is used to store the 64-bit unique identifier
(UID). The UID is compliant with the ISO 15963 description, and its value is used during the
anticollision sequence (Inventory). This block is not accessible by the user and its value is
written by ST on the production line.
The M24LR64-R includes an AFI register that stores the application family identifier, and a
DSFID register that stores the data storage family identifier used in the anticollision
algorithm.
The M24LR64-R has four additional 32-bit blocks that store an I
password codes.
Figure 3.
Block diagram
AC0
AC1
RF V
RF
CC
Doc ID 15171 Rev 4
Power management
Logic
EEPROM
Latch
Contact V
2
I
2
C password plus three RF
C
Figure 4
CC
ai15123
shows the
SCL
SDA
V
V
CC
SS
M24LR64-R

Related parts for M24LR64-RMR6T/2