LC4256ZE-7TN100I Lattice, LC4256ZE-7TN100I Datasheet - Page 30
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LC4256ZE-7TN100I
Manufacturer Part Number
LC4256ZE-7TN100I
Description
CPLD - Complex Programmable Logic Devices 64 I/O ULT LW PWR 256MC 1.8V 7.5NS IND
Manufacturer
Lattice
Series
ispMACH®r
Datasheet
1.LC4064ZE-5TN100C.pdf
(60 pages)
Specifications of LC4256ZE-7TN100I
Memory Type
EEPROM
Number Of Macrocells
256
Maximum Operating Frequency
178.57 MHz
Delay Time
7.5 ns
Number Of Programmable I/os
64
Operating Supply Voltage
1.8 V
Supply Current
0.341 mA
Maximum Operating Temperature
+ 105 C
Minimum Operating Temperature
- 40 C
Package / Case
TQFP-100
Mounting Style
SMD/SMT
Supply Voltage (max)
1.9 V
Supply Voltage (min)
1.7 V
Programmable Type
CPLD
Voltage - Input
1.7 V ~ 1.9 V
Speed
7.5ns
Mounting Type
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LC4256ZE-7TN100I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
Boundary Scan Waveforms and Timing Specifications
t
t
t
t
t
t
t
t
t
t
t
t
t
t
BTCP
BTCH
BTCL
BTSU
BTH
BRF
BTCO
BTOZ
BTVO
BTCPSU
BTCPH
BTUCO
BTUOZ
BTUOV
Symbol
TCK [BSCAN test] clock cycle
TCK [BSCAN test] pulse width high
TCK [BSCAN test] pulse width low
TCK [BSCAN test] setup time
TCK [BSCAN test] hold time
TCK [BSCAN test] rise and fall time
TAP controller falling edge of clock to valid output
TAP controller falling edge of clock to data output disable
TAP controller falling edge of clock to data output enable
BSCAN test Capture register setup time
BSCAN test Capture register hold time
BSCAN test Update reg, falling edge of clock to valid output
BSCAN test Update reg, falling edge of clock to output disable
BSCAN test Update reg, falling edge of clock to output enable
Parameter
30
ispMACH 4000ZE Family Data Sheet
Min.
40
20
20
10
50
10
—
—
—
—
—
—
8
8
Max.
10
10
10
25
25
25
—
—
—
—
—
—
—
—
mV/ns
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns