AGL400V5-CSG196 Actel, AGL400V5-CSG196 Datasheet - Page 144
![FPGA - Field Programmable Gate Array 400K System Gates](/photos/16/15/161500/csp196_sml.jpg)
AGL400V5-CSG196
Manufacturer Part Number
AGL400V5-CSG196
Description
FPGA - Field Programmable Gate Array 400K System Gates
Manufacturer
Actel
Datasheet
1.AGL030V2-CSG81.pdf
(236 pages)
Specifications of AGL400V5-CSG196
Processor Series
AGL400
Core
IP Core
Maximum Operating Frequency
250 MHz
Number Of Programmable I/os
143
Data Ram Size
54 Kbit
Supply Voltage (max)
1.5 V
Supply Current
27 uA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.5 V
Number Of Gates
400 K
Package / Case
CSP-196
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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IGLOO DC and Switching Characteristics
Figure 2-43 • FIFO FULL Flag and AFULL Flag Assertion
Figure 2-44 • FIFO EMPTY Flag and AEMPTY Flag Deassertion
Figure 2-45 • FIFO FULL Flag and AFULL Flag Deassertion
2- 13 0
(Address Counter)
(Address Counter)
(Address Counter)
AEMPTY
EMPTY
WA/RA
WA/RA
WCLK
FULL
AFULL
WCLK
RCLK
RCLK
WA/RA
AFULL
WCLK
FULL
(EMPTY)
MATCH (FULL)
MATCH
NO MATCH
1st Rising
After 1st
Edge
Write
1st Rising
After 1st
Edge
Read
NO MATCH
NO MATCH
2nd Rising
t
NO MATCH
CYC
After 1st
Edge
Write
NO MATCH
1st Rising
After 2nd
Edge
Read
NO MATCH
t
RCKEF
R ev isio n 1 8
t
WCKF
t
CKAF
NO MATCH
NO MATCH
Dist = AFF_TH
NO MATCH
NO MATCH
t
WCKFF
t
CKAF
MATCH (FULL)
t
CKAF
Dist = AEF_TH + 1
Dist = AFF_TH – 1
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