A3P1000L-FGG144 Actel, A3P1000L-FGG144 Datasheet - Page 122
A3P1000L-FGG144
Manufacturer Part Number
A3P1000L-FGG144
Description
FPGA - Field Programmable Gate Array 1M SYSTEM GATES
Manufacturer
Actel
Datasheet
1.A3P250L-VQG100.pdf
(224 pages)
Specifications of A3P1000L-FGG144
Processor Series
A3P1000
Core
IP Core
Maximum Operating Frequency
781.25 MHz
Number Of Programmable I/os
97
Data Ram Size
147456
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
A3PE-Proto-Kit, A3PE-Brd1500-Skt, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Number Of Gates
1 M
Package / Case
FPBGA-144
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
A3P1000L-FGG144
Manufacturer:
Microsemi SoC
Quantity:
10 000
Company:
Part Number:
A3P1000L-FGG144I
Manufacturer:
Microsemi SoC
Quantity:
10 000
- Current page: 122 of 224
- Download datasheet (8Mb)
ProASIC3L DC and Switching Characteristics
Table 2-186 • Output Enable Register Propagation Delays
Table 2-187 • Output Enable Register Propagation Delays
2- 10 8
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Note:
Parameter
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Note:
OECLKQ
OESUD
OEHD
OESUE
OEHE
OECLR2Q
OEPRE2Q
OEREMCLR
OERECCLR
OEREMPRE
OERECPRE
OEWCLR
OEWPRE
OECKMPWH
OECKMPWL
OECLKQ
OESUD
OEHD
OESUE
OEHE
OECLR2Q
OEPRE2Q
OEREMCLR
OERECCLR
OEREMPRE
OERECPRE
OEWCLR
OEWPRE
OECKMPWH
OECKMPWL
For specific junction temperature and voltage supply levels, refer to
For specific junction temperature and voltage supply levels, refer to
Timing Characteristics
Commercial-Case Conditions: T
Clock-to-Q of the Output Enable Register
Data Setup Time for the Output Enable Register
Data Hold Time for the Output Enable Register
Enable Setup Time for the Output Enable Register
Enable Hold Time for the Output Enable Register
Asynchronous Clear-to-Q of the Output Enable Register
Asynchronous Preset-to-Q of the Output Enable Register
Asynchronous Clear Removal Time for the Output Enable Register
Asynchronous Clear Recovery Time for the Output Enable Register
Asynchronous Preset Removal Time for the Output Enable Register
Asynchronous Preset Recovery Time for the Output Enable Register
Asynchronous Clear Minimum Pulse Width for the Output Enable Register
Asynchronous Preset Minimum Pulse Width for the Output Enable Register
Clock Minimum Pulse Width High for the Output Enable Register
Clock Minimum Pulse Width Low for the Output Enable Register
Commercial-Case Conditions: T
Clock-to-Q of the Output Enable Register
Data Setup Time for the Output Enable Register
Data Hold Time for the Output Enable Register
Enable Setup Time for the Output Enable Register
Enable Hold Time for the Output Enable Register
Asynchronous Clear-to-Q of the Output Enable Register
Asynchronous Preset-to-Q of the Output Enable Register
Asynchronous Clear Removal Time for the Output Enable Register
Asynchronous Clear Recovery Time for the Output Enable Register
Asynchronous Preset Removal Time for the Output Enable Register
Asynchronous Preset Recovery Time for the Output Enable Register
Asynchronous Clear Minimum Pulse Width for the Output Enable Register
Asynchronous Preset Minimum Pulse Width for the Output Enable Register
Clock Minimum Pulse Width High for the Output Enable Register
Clock Minimum Pulse Width Low for the Output Enable Register
1.5 V DC Core Voltage
1.2 V DC Core Voltage
J
J
Description
Description
= 70°C, Worst-Case VCC = 1.425 V
= 70°C, Worst-Case VCC = 1.14 V
R e visio n 9
Table 2-6 on page 2-7
Table 2-6 on page 2-7
for derating values.
for derating values.
0.32 0.37
0.44 0.52
0.00 0.00
0.68 0.80
0.00 0.00
0.23 0.27
0.00 0.00
0.23 0.27
0.19 0.22
0.19 0.22
0.31 0.36
0.28 0.32
0.42 0.49
0.58 0.68
0.00 0.00
0.89 1.04
0.00 0.00
0.30 0.35
0.00 0.00
0.30 0.35
0.19 0.22
0.19 0.22
0.31 0.36
0.28 0.32
0.45 0.53
0.00 0.00
0.68 0.80
0.59 0.70
0.00 0.00
0.89 1.04
–1
–1
Std. Units
Std. Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Related parts for A3P1000L-FGG144
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
Part Number:
Description:
PBGA 484/FPGA, 24576 CLBS, 1000000 GATES
Manufacturer:
Actel
Part Number:
Description:
PBGA 256/FPGA, 24576 CLBS, 1000000 GATES
Manufacturer:
Actel
Part Number:
Description:
FBGA 144/FPGA, 24576 CLBS, 1000000 GATES
Manufacturer:
Actel
Part Number:
Description:
FBGA 144/FPGA, 24576 CLBS, 1000000 GATES
Manufacturer:
Actel
Part Number:
Description:
PBGA 256/FPGA, 24576 CLBS, 1000000 GATES
Manufacturer:
Actel
Part Number:
Description:
FPGA - Field Programmable Gate Array 1M SYSTEM GATES
Manufacturer:
Actel
Datasheet:
Part Number:
Description:
FPGA - Field Programmable Gate Array 1M SYSTEM GATES
Manufacturer:
Actel
Datasheet:
Part Number:
Description:
FPGA - Field Programmable Gate Array 1M SYSTEM GATES
Manufacturer:
Actel
Datasheet:
Part Number:
Description:
MCU, MPU & DSP Development Tools Silicon Sculptor Programming Mod
Manufacturer:
Actel
Part Number:
Description:
MCU, MPU & DSP Development Tools InSystem Programming ProASICPLUS Devices
Manufacturer:
Actel
Part Number:
Description:
Programming Socket Adapters & Emulators PQ160 Module
Manufacturer:
Actel