LFXP10E-3FN256I Lattice, LFXP10E-3FN256I Datasheet - Page 62
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LFXP10E-3FN256I
Manufacturer Part Number
LFXP10E-3FN256I
Description
FPGA - Field Programmable Gate Array 9.7K LUTs 188 IO 1.2 V -3 Spd I
Manufacturer
Lattice
Datasheet
1.LFXP3C-3QN208C.pdf
(130 pages)
Specifications of LFXP10E-3FN256I
Number Of Programmable I/os
188
Data Ram Size
221184
Supply Voltage (max)
1.26 V
Maximum Operating Temperature
+ 100 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.14 V
Package / Case
FPBGA-256
Number Of Logic Elements/cells
*
Number Of Labs/clbs
*
Total Ram Bits
*
Number Of I /o
*
Number Of Gates
*
Voltage - Supply
*
Mounting Type
*
Operating Temperature
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFXP10E-3FN256I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
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- Download datasheet (2Mb)
Lattice Semiconductor
PICs and DDR Data (DQ) Pins Associated with the DDR Strobe (DQS) Pin
P[Edge] [n-4]
P[Edge] [n-3]
P[Edge] [n-2]
P[Edge] [n-1]
P[Edge] [n]
P[Edge] [n+1]
P[Edge] [n+2]
P[Edge] [n+3]
Notes:
1. “n” is a row/column PIC number.
2. The DDR interface is designed for memories that support one DQS strobe per eight bits of data. In some packages, all the potential DDR
3. The definition of the PIC numbering is provided in the Signal Names column of the Signal Descriptions table in this data sheet.
data (DQ) pins may not be available.
with DQS Strobe
PICs Associated
PIO within PIC
A
B
A
B
A
B
A
B
A
B
A
B
A
B
4-3
Complement
Complement
Complement
Complement
Complement
Complement
Complement
Polarity
True
True
True
True
True
True
True
LatticeXP Family Data Sheet
Pinout Information
and Data (DQ) Pins
DDR Strobe (DQS)
[Edge]DQSn
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
DQ
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