AGL125V5-CSG196 Actel, AGL125V5-CSG196 Datasheet - Page 54
AGL125V5-CSG196
Manufacturer Part Number
AGL125V5-CSG196
Description
FPGA - Field Programmable Gate Array 125K System Gates
Manufacturer
Actel
Datasheet
1.AGL030V2-CSG81.pdf
(236 pages)
Specifications of AGL125V5-CSG196
Processor Series
AGL125
Core
IP Core
Maximum Operating Frequency
892.86 MHz
Number Of Programmable I/os
133
Data Ram Size
36864
Supply Voltage (max)
1.575 V
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Development Tools By Supplier
AGL-Icicle-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FlashPro 4, FlashPro 3, FlashPro Lite
Mounting Style
SMD/SMT
Supply Voltage (min)
1.425 V
Number Of Gates
125 K
Package / Case
CSP-196
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AGL125V5-CSG196
Manufacturer:
Actel
Quantity:
135
Part Number:
AGL125V5-CSG196
Manufacturer:
ACTEL/爱特
Quantity:
20 000
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IGLOO DC and Switching Characteristics
2- 40
The length of time an I/O can withstand I
reliability data below is based on a 3.3 V, 12 mA I/O setting, which is the worst case for this type of
analysis.
For example, at 110°C, the short current condition would have to be sustained for more than three
months to cause a reliability concern. The I/O design does not contain any short circuit protection, but
such protection would only be needed in extremely prolonged stress conditions.
Table 2-44 • Duration of Short Circuit Event before Failure
Table 2-45 • I/O Input Rise Time, Fall Time, and Related I/O Reliability
Temperature
–40°C
–20°C
0°C
25°C
70°C
85°C
100°C
110°C
Input Buffer
LVTTL/LVCMOS
LVDS/B-LVDS/M-LVDS/
LVPECL
*
The maximum input rise/fall time is related to the noise induced into the input buffer trace. If the noise is
low, then the rise time and fall time of input buffers can be increased beyond the maximum value. The
longer the rise/fall times, the more susceptible the input signal is to the board noise. Actel recommends
signal integrity evaluation/characterization of the system to ensure that there is no excessive noise
coupling into input signals.
Input Rise/Fall Time
No requirement
No requirement
(min.)
OSH
R ev i sio n 1 8
/I
OSL
events depends on the junction temperature. The
Input Rise/Fall Time
10 ns *
10 ns *
(max.)
Time before Failure
> 20 years
> 20 years
> 20 years
> 20 years
6 months
3 months
5 years
2 years
10 years (100°C)
20 years (110°C)
Reliability
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