AGLN030V5-ZVQG100 Actel, AGLN030V5-ZVQG100 Datasheet - Page 37
AGLN030V5-ZVQG100
Manufacturer Part Number
AGLN030V5-ZVQG100
Description
FPGA - Field Programmable Gate Array 30K System Gates IGLOO nano
Manufacturer
Actel
Datasheet
1.AGLN030V5-ZUCG81.pdf
(140 pages)
Specifications of AGLN030V5-ZVQG100
Processor Series
AGLN030
Core
IP Core
Number Of Macrocells
256
Maximum Operating Frequency
250 MHz
Number Of Programmable I/os
77
Supply Voltage (max)
1.5 V
Supply Current
6 uA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
- 20 C
Development Tools By Supplier
AGLN-Nano-Kit, AGLN-Z-Nano-Kit, AGL-Dev-Kit-SCS, Silicon-Explorer II, Silicon-Sculptor 3, SI-EX-TCA, FLASHPRO 4, FlashPro 3, FLASHPRO LITE
Mounting Style
SMD/SMT
Supply Voltage (min)
1.5 V
Number Of Gates
30 K
Package / Case
VQFP-100
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AGLN030V5-ZVQG100
Manufacturer:
Microsemi SoC
Quantity:
10 000
Company:
Part Number:
AGLN030V5-ZVQG100I
Manufacturer:
Microsemi SoC
Quantity:
10 000
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Table 2-27 • Input Capacitance
Table 2-28 • I/O Output Buffer Maximum Resistances
Symbol
C
C
Standard
3.3 V LVTTL / 3.3V LVCMOS
3.3 V LVCMOS Wide Range
2.5 V LVCMOS
1.8 V LVCMOS
1.5 V LVCMOS
1.2 V LVCMOS
1.2 V LVCMOS Wide Range
Notes:
1. These maximum values are provided for informational reasons only. Minimum output buffer resistance values depend
2. R
3. R
4. Applicable to IGLOO nano V2 devices operating at VCCI
IN
INCLK
on VCCI, drive strength selection, temperature, and process. For board design considerations and detailed output buffer
resistances, use the corresponding IBIS models located on the Actel website:
http://www.actel.com/download/ibis/default.aspx.
(PULL-DOWN-MAX)
(PULL-UP-MAX)
Input capacitance
Input capacitance on the clock pin
Detailed I/O DC Characteristics
4
= (VCCImax – VOHspec) / I
= (VOLspec) / IOLspec
4
Definition
Drive Strength
O H s p e c
100 µA
100 µA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
6 mA
8 mA
2 mA
4 mA
2 mA
1 mA
R ev i si o n 1 1
1
≥
VCC.
VIN = 0, f = 1.0 MHz
VIN = 0, f = 1.0 MHz
Same as equivalent software default drive
R
Conditions
PULL-DOWN
(Ω)
100
100
100
100
200
100
200
315
315
50
50
50
50
2
IGLOO nano Low Power Flash FPGAs
Min.
R
PULL-UP
Max.
(Ω)
300
300
150
150
200
200
100
100
225
224
315
315
112
8
8
3
Units
pF
pF
2- 23
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