LFX125EB-04FN256C Lattice, LFX125EB-04FN256C Datasheet - Page 118

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LFX125EB-04FN256C

Manufacturer Part Number
LFX125EB-04FN256C
Description
FPGA - Field Programmable Gate Array E-Ser139K Gt ispJTAG 2.5/3.3V -4 Spd
Manufacturer
Lattice
Datasheets

Specifications of LFX125EB-04FN256C

Number Of Macrocells
1936
Number Of Programmable I/os
160
Data Ram Size
94208
Supply Voltage (max)
3.6 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Supply Voltage (min)
1.65 V
Number Of Gates
139 K
Package / Case
FPBGA-256
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LFX125EB-04FN256C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Lattice Semiconductor
For Further Information
In addition to this data sheet, the following Lattice technical notes may be helpful when designing with the ispXPGA
Family:
Revision History
LFX500EC-04FN900C
LFX500EC-03FN900C
LFX125EB-04FN256I
LFX125EB-03FN256I
LFX125EC-03FN256I
LFX200EB-04FN256I
LFX200EB-03FN256I
LFX200EC-03FN256I
LFX500EB-04FN900I
LFX500EB-03FN900I
LFX500EC-03FN900I
September 2003
January 2004
June 2004
• TN1028,
• TN1003,
• TN1000,
• TN1026,
• TN1020,
• TN1043,
Date
Part Number
Part Number
ispXPGA Memory Usage Guidelines
sysCLOCK PLL Usage and Design Guidelines
sysIO Usage Guidelines for Lattice Devices
ispXP Configuration Usage Guidelines
sysHSI Usage Guidelines
Power Estimation in ispXPGA Devices
Version
07.1
08.0
07
Previous Lattice releases.
Improved typical Icc data for LFX125B/C and LFX500B/C.
Improved external switching characteristics timing numbers for LFX125B/C.
Improved PIC timing numbers for LFX125B/C.
Improved t
Improved external switching characteristics timing numbers for LFX500B/C.
Improved PIC timing numbers for LFX500B/C.
Improved t
Enhanced CDR functionality description.
Logic Signal Connections and Signal Descriptions - removed CDRLOCK, LOSS and EXLOSS
descriptions.
Added lead-free package designators.
Updated CDR specifications and reference notes. Removed Source Synchronous (SS:No CAL)
mode references for the sysHSI blocks.
Revised Figures 16 and 24 for clarification.
Clarification of VCC sysHSI Block for 1.8V devices.
Updated IIL and IIH max specification.
Updated LVTTL and PCI 3.3 to support 5V tolerance.
Gates
Gates
476K
476K
139K
139K
139K
210K
210K
210K
476K
476K
476K
IOINDLY
IOINDLY
“E-Series” Commercial (Cont.)
timing numbers for LFX125B/C.
timing numbers for LFX500B/C.
“E-Series” Industrial
Voltage
Voltage
2.5/3.3
2.5/3.3
2.5/3.3
2.5/3.3
2.5/3.3
2.5/3.3
1.8
1.8
1.8
1.8
1.8
114
Speed Grade
Speed Grade
Change Summary
-4
-3
-4
-3
-3
-4
-3
-3
-4
-3
-3
ispXPGA Family Data Sheet
Lead-Free fpBGA
Lead-Free fpBGA
Lead-Free fpBGA
Lead-Free fpBGA
Lead-Free fpBGA
Lead-Free fpBGA
Lead-Free fpBGA
Lead-Free fpBGA
Lead-Free fpBGA
Lead-Free fpBGA
Lead-Free fpBGA
Package
Package
Balls
Balls
900
900
256
256
256
256
256
256
900
900
900

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