AUIRF7665S2TR International Rectifier, AUIRF7665S2TR Datasheet - Page 7

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AUIRF7665S2TR

Manufacturer Part Number
AUIRF7665S2TR
Description
MOSFET N-CH 100V 77A DIRECTFET2
Manufacturer
International Rectifier
Series
HEXFET®r
Datasheet

Specifications of AUIRF7665S2TR

Input Capacitance (ciss) @ Vds
515pF @ 25V
Fet Type
MOSFET N-Channel, Metal Oxide
Fet Feature
Standard
Rds On (max) @ Id, Vgs
62 mOhm @ 8.9A, 10V
Drain To Source Voltage (vdss)
100V
Current - Continuous Drain (id) @ 25° C
77A
Vgs(th) (max) @ Id
5V @ 25µA
Gate Charge (qg) @ Vgs
13nC @ 10V
Power - Max
2.4W
Mounting Type
*
Package / Case
*
Configuration
Single Quad Drain
Transistor Polarity
N-Channel
Resistance Drain-source Rds (on)
62 mOhms
Drain-source Breakdown Voltage
100 V
Gate-source Breakdown Voltage
+/- 20 V
Continuous Drain Current
4.1 A
Power Dissipation
2.4 W
Gate Charge Qg
8.3 nC
Minimum Operating Temperature
- 55 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Fig 17. Maximum Avalanche Energy Vs. Temperature
www.irf.com
0
Fig 18a. Unclamped Inductive Test Circuit
40
35
30
25
20
15
10
5
0
Fig 19a. Gate Charge Test Circuit
25
Fig 20a. Switching Time Test Circuit
Starting T J , Junction Temperature (°C)
R G
20K
20V
V
V DS
1K
50
GS
t p
TOP
BOTTOM 1.0% Duty Cycle
I D = 8.9A
75
I AS
D.U.T
≤ 0.1 %
≤ 1
0.01 Ω
L
S
100
DUT
Single Pulse
125
15V
L
DRIVER
+
- V DD
150
+
-
A
175
VCC
Notes on Repetitive Avalanche Curves , Figures 16, 17:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
2. Safe operation in Avalanche is allowed as long asT
3. Equation below based on circuit and waveforms shown in
4. P
5. BV = Rated breakdown voltage (1.3 factor accounts for
6. I
7. ∆T
Purely a thermal phenomenon and failure occurs at a
not exceeded.
Figures 18a, 18b.
avalanche pulse.
voltage increase during avalanche).
T
t
D = Duty cycle in avalanche = t
Z
temperature far in excess of T
every part type.
av
av =
Fig 18b. Unclamped Inductive Waveforms
thJC
D (ave)
jmax
= Allowable avalanche current.
=
Average time in avalanche.
(D, t
Allowable rise in junction temperature, not to exceed
Id
(assumed as 25°C in Figure 16, 17).
Fig 19b. Gate Charge Waveform
= Average power dissipation per single
I
Fig 20b. Switching Time Waveforms
Vgs
AS
av
P
) = Transient thermal resistance, see figure 11)
V
90%
10%
V
D (ave)
DS
GS
= 1/2 ( 1.3·BV·I
I
E
av
t
d(on)
AS (AR)
= 2DT/ [1.3·BV·Z
Qgodr
t p
t
r
= P
D (ave)
jmax
av
av
. This is validated for
·f
) = DT/ Z
·t
V
Qgd
th
av
(BR)DSS
]
t
d(off)
thJC
Qgs2
t
Vgs(th)
f
Vds
Qgs1
jmax
is
7

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