MPC8533EVTANGA Freescale Semiconductor, MPC8533EVTANGA Datasheet - Page 2

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MPC8533EVTANGA

Manufacturer Part Number
MPC8533EVTANGA
Description
MPU POWERQUICC 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets

Specifications of MPC8533EVTANGA

Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
800MHz
Voltage
0.95 V ~ 1.05 V
Mounting Type
Surface Mount
Package / Case
783-BBGA, FCBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC8533EVTANGA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Learn More: For more information about Freescale Semiconductor products, please visit www.freescale.com.
Key Features
The MPC8533E processor includes 256 KB
L2 cache, an integrated security engine,
64-bit DDR or DDR2 scaling to 533 MHz data
rate, 32-bit PCI, multiple PCI Express interfaces,
local bus I/O interfaces and two GigE
interfaces. The combination of these features
makes this device an optimal communications
processing solution for Ethernet-only or PCI
Express interworking applications, such as
enterprise networking and advanced
multifunction printer (MFP) imaging applications.
The MPC8533E device is ideal for connecting
high-speed DDR2 memory interfaces and
peripherals in high-performance distributed
systems. Examples include control plane
processing, protocol processing and other
compute-intensive applications requiring
high-speed, peer-level communications
with a low pin count. The MPC8533E is a
full-featured, high-performance processor that
can operate fanlessly for further support of
power sensitive applications.
Key Advantages
> High level of integration and performance
> Consistent programming model across the
> Flexible SoC platform for fast time
> Simplified board design
> Large L2 cache at 256 KB
> High internal processing bandwidth
> Integrated DDR and DDR2 memory
> Two integrated Ethernet controllers
> Flexible high-speed interconnection
> 32-bit PCI support
> Integrated security engine
PowerQUICC III family
to market
controller
(enhanced TSEC) with wake-on-LAN
capability
interfaces/multiple PCI Express connections
Freescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property
of their respective owners. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are
trademarks and service marks licensed by Power.org.
© Freescale Semiconductor, Inc. 2006
Document Number: MPC8533EFS
REV 1
High-Speed Connectivity
Freescale’s MPC8533E processor is uniquely
positioned to offer a wide range of high-speed
connectivity options. The flexibility in the
processor is due to highly integrated speed and
latency optimized technology. The MPC8533E
includes enhanced Three Speed Ethernet with
TCP/UDP/IP Checksum Offload, direct FIFO
mode for ASIC connectivity and support for
multiple PCI Express interface options. The
MPC8533E is a highly scalable control plane
processor with the flexibility to connect and
complement network processors that perform
data plane processing. Concurrently, the
MPC8533 also provides connectivity solutions
for interfacing modern high-speed ASICs.
With its e500 core built on Power Architecture
technology, this compact PowerQUICC III
handles complex, computationally demanding
control plane processing tasks with ease.
The MPC8533E processors also feature
field-proven, next-generation DDR2 memory
controllers and industry-leading hardware
acceleration for encryption protocols.
MPC8533E Technical Specifications
> Embedded e500 core, initial offerings up
> Enhanced hardware and software
> Double-precision embedded scalar and
> Memory management unit (MMU)
> Integrated L1/L2 cache
to 667 MHz, targeting up to 1.0 GHz
• Dual dispatch superscalar, 7-stage
• 2,240 MIPS at 1.0 GHz (estimated
• 36-bit physical addressing
debug support
vector floating-point APUs
• L1 cache—32 KB data and 32 KB
• L2 cache—256 KB (8-way set associative);
pipeline design with out-of-order issue
and execution
Dhrystone 2.1)
instruction cache with line-locking support
256/128/64/32 KB can be used as SRAM
> Integrated DDR memory controller with full
> Integrated security engine supporting
> Two on-chip Three Speed Ethernet
> General-purpose input/output (GPIO)
> PCI Express high-speed interconnect
> On-chip network (OCeaN) switch fabric
> PCI interface support
> Local bus
> Integrated four-channel DMA controller
> Dual I
> Programmable interrupt controller (PIC)
> IEEE 1149.1 JTAG test access port
> 1.0V core voltage with 3.3V and 2.5V I/O
> 783-pin FC-BGA package
• L1 and L2 hardware coherency
• L2 cache and I/O transactions can be
• 200 MHz clock rate (400 MHz data rate),
• 267 MHz clock rate (up to 533 MHz data
• TCP/UDP/IP checksum acceleration
• Advanced QoS features
• 32-bit PCI 2.2 bus controller (up to 66
• 166 MHz, 32-bit, 3.3V I/O, local bus with
ECC support, offering:
DES, 3DES, MD-5, SHA-1/2, AES,
RSA, RNG, Kasumi F8/F9 and ARC-4
encryption algorithms
controllers (ETSECs) supporting 10 Mbps,
100 Mbps and 1 Gbps Ethernet/IEEE 802.3
networks with MII, RMII, RGMII and RTBI
physical interfaces
interfaces, supporting combinations of
dual x4 and single x1 PCI Express
stashed into L2 cache regions
64-bit, 2.5V/2.6V I/O, DDR SDRAM
rate), 64-bit, 1.8V I/O, DDR2 SDRAM
MHz, 3.3V I/O)
memory controller
2
C and DUART support

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