PC28F640P30B85E NUMONYX, PC28F640P30B85E Datasheet - Page 75
![IC FLASH 64MBIT 85NS 64EZBGA](/photos/7/26/72676/pc28f640p30b85_s_la9d_sml.jpg)
PC28F640P30B85E
Manufacturer Part Number
PC28F640P30B85E
Description
IC FLASH 64MBIT 85NS 64EZBGA
Manufacturer
NUMONYX
Series
StrataFlash™r
Datasheet
1.RD48F4400P0VBQEJ.pdf
(97 pages)
Specifications of PC28F640P30B85E
Format - Memory
FLASH
Memory Type
FLASH
Memory Size
64M (4M x 16)
Speed
85ns
Interface
Parallel
Voltage - Supply
1.7 V ~ 2 V
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
890209
890209
PC28F640P30B85 S LA9D
890209
PC28F640P30B85 S LA9D
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PC28F640P30B85E
Manufacturer:
Micron Technology Inc
Quantity:
10 000
P30
Table 44: Protection Register Information
Table 45: Burst Read Information
August 2008
Order Number: 306666-12
P = 10Ah
P = 10Ah
Offset
(P+1C)h
Offset
(P+1D)h
(P+10)h
(P+11)h
(P+12)h
(P+13)h
(P+14)h
(P+15)h
(P+16)h
(P+17)h
(P+18)h
(P+19)h
(P+1A)h
(P+1B)h
(P+1E)h
(P+1F)h
(P+20)h
(P+21)h
(P+22)h
(P+E)h
(P+F)h
(1)
(1)
Length
Length
10
1
1
4
1
1
1
1
1
Number of Protection register fields in JEDEC ID space.
Protection Field 1: Protection Description
Protection Field 2: Protection Description
Page Mode Read capability
bits 0–7 = “n” such that 2
Number of synchronous mode read configuration fields that
follow. 00h indicates no burst capability.
Synchronous mode read capability configuration 1
Synchronous mode read capability configuration 2
Synchronous mode read capability configuration 3
Synchronous mode read capability configuration 4
“00h,” indicates that 256 protection fields are available
This field describes user-available One Time Programmable
(OTP) Protection register bytes. Some are pre-programmed
with device-unique serial numbers. Others are user
programmable. Bits 0–15 point to the Protection register Lock
byte, the section’s first byte. The following bytes are factory
pre-programmed and user-programmable.
bits 0–7 = Lock/bytes Jedec-plane physical low address
bits 8–15 = Lock/bytes Jedec-plane physical high address
bits 16–23 = “n” such that 2
bits 24–31 = “n” such that 2
Bits 0–31 point to the Protection register physical Lock-word
address in the Jedec-plane.
Following bytes are factory or user-programmable.
read-page bytes. See offset 28h for device word width to
determine page-mode data output width. 00h indicates no
read page buffer.
Bits 3–7 = Reserved
bits 0–2 “n” such that 2
maximum number of continuous synchronous reads when
the device is configured for its maximum word width. A value
of 07h indicates that the device is capable of continuous
linear bursts that will output data until the internal burst
counter reaches the end of the device’s burstable address
space. This field’s 3-bit value can be written directly to the
Read Configuration Register bits 0–2 if the device is
configured for its maximum word width. See offset 28h for
word width to determine the burst data output width.
bits 32–39 = “n” ∴ n = factory pgm'd groups (low byte)
bits 40–47 = “n” ∴ n = factory pgm'd groups (high byte)
bits 48–55 = “n” \ 2n = factory programmable bytes/group
bits 56–63 = “n” ∴ n = user pgm'd groups (low byte)
bits 64–71 = “n” ∴ n = user pgm'd groups (high byte)
bits 72–79 = “n” ∴ 2
(Optional flash features and commands)
(Optional flash features and commands)
n
n
n+1
= user programmable bytes/group
Description
Description
HEX value represents the number of
HEX value represents the
n
n
= factory pre-programmed bytes
= user programmable bytes
Add. Code Value
Add. Code Value
11A:
11B:
11C:
11D:
11E:
11F:
12A:
12B:
12C:
118:
119:
120:
121:
122:
123:
124:
125:
126:
127:
128:
129:
Hex
Hex
--02
--80
--00
--03
--03
--89
--00
--00
--00
--00
--00
--00
--10
--00
--04
--03
--04
--01
--02
--03
--07
Datasheet
8 byte
8 byte
8 byte
Cont
80h
00h
89h
00h
00h
00h
16
16
16
2
0
0
0
0
4
4
8
75