RC48F4400P0TB00A NUMONYX, RC48F4400P0TB00A Datasheet - Page 82

IC FLASH 512MBIT 85NS 64EZBGA

RC48F4400P0TB00A

Manufacturer Part Number
RC48F4400P0TB00A
Description
IC FLASH 512MBIT 85NS 64EZBGA
Manufacturer
NUMONYX
Series
StrataFlash™r
Datasheet

Specifications of RC48F4400P0TB00A

Format - Memory
FLASH
Memory Type
FLASH
Memory Size
512M (32Mx16)
Speed
85ns
Interface
Parallel
Voltage - Supply
2.3 V ~ 3.6 V
Operating Temperature
-40°C ~ 85°C
Package / Case
64-EZBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
885960
885960
RC48F4400P0TB00885960

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
RC48F4400P0TB00A
Manufacturer:
Micron Technology Inc
Quantity:
10 000
Figure 36: Buffer Program Flowchart
Datasheet
82
Yes
Read Status Register
Read Status Register
Issue Write to Buffer
Command E8h and
and Block Address
(at Block Address)
Write Word Count,
Write Confirm D0h
Program Complete
Write Buffer Data,
Is WSM Ready?
Another Buffered
Check if Desired
Supports Buffer
Target Address
Set Timeout or
Block Address
Block Address
Programming?
Loop Counter
Start Address
Full Status
Get Next
X = N?
SR.7 =?
Writes?
SR.7 =
Device
X = 0
Start
1 = Yes
Yes
Yes
No
1
No
No
Write Buffer Data,
Buffered Program
Use Single Word
Write to another
Abort Bufferred
Block Address
Block Address
Programming
Program?
X = X + 1
Expired?
or Count
Timeout
Suspend
Aborted
Program
No
No
Yes
No
Yes
Yes
Suspend
Program
Loop
1. Word count values on DQ
register. Count ranges for this device are N = 0000h to 0001Fh.
2. The device outputs the status register when read.
3. Write Buffer contents will be programmed at the device start
address or destination flash address.
4. Align the start address on a Write Buffer boundary for
maximum programming performance (i.e., A
address = 0).
5. The device aborts the Buffered Program command if the
current address is outside the original block address.
6. The Status register indicates an "improper command
sequence" if the Buffered Program command is aborted. Follow
this with a Clear Status Register command.
Full status check can be done after all erase and write
sequences complete. Write FFh after the last operation to reset
the device to read array mode.
(Notes 1, 2)
(Notes 3, 4)
(Notes 5, 6)
Operation
Standby
Standby
Read
Read
Write
Write
Write
Write
Write
Bus
Command
Program
Write to
Confirm
Buffer
0
-DQ
Data = E8H
Addr = Block Address
SR.7 = Valid
Addr = Block Address
Check SR.7
1 = Device WSM is Busy
0 = Device WSM is Ready
Data = N-1 = Word Count
N = 0 corresponds to count = 1
Addr = Block Address
Data = Write Buffer Data
Addr = Start Address
Data = Write Buffer Data
Addr = Block Address
Data = D0H
Addr = Block Address
Status register Data
CE# and OE# low updates SR
Addr = Block Address
Check SR.7
1 = WSM Ready
0 = WSM Busy
7
are loaded into the Count
Comments
4
–A
0
of the start
August 2008
306666-12
P30

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