DC1747A-A Linear Technology, DC1747A-A Datasheet - Page 2

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DC1747A-A

Manufacturer Part Number
DC1747A-A
Description
EVALUATION LOW EM1 KIT LTM2882-3
Manufacturer
Linear Technology
Series
µModuler
Datasheets

Specifications of DC1747A-A

Main Purpose
Interface, Transceiver RS-232
Embedded
No
Utilized Ic / Part
LTM2882
Primary Attributes
3V Supply, Dual, Isolated, Transceiver + Power
Kit Contents
Board, Datasheet
Tool / Board Applications
Interface-Backplane, PCI, PCI Express, RS-XXX, Digital & Opto Isolator
Mcu Supported Families
LTM2882
Development Tool Type
Hardware - Eval/Demo Board
Lead Free Status / RoHS Status
Not applicable / Not applicable
Secondary Attributes
-
DEMO MANUAL DC1747A
OPERATING PRINCIPLES
The logic supply voltage V
circuit. The ON pin and the spare logic channel DIN to
DOUT, connected to DE, are selectable by jumper pro-
gramming only.
EMI mitigation techniques used include the following:
1. Four layer PCB, allowing for isolated side to logic side
2. Discrete bridge capacitors (C3, C4) mounted between
2
“bridge” capacitor. The bridge capacitor is formed be-
tween an inner layer of fl oating copper which overlaps
the logic side and isolated side ground planes. This
structure creates two series capacitors, each with ap-
proximately 0.008" of insulation, supporting the full
dielectric withstand rating of 2500V
capacitor provides a low impedance return path for
injected currents due to parasitic capacitances of the
LTM2882’s signal and power isolating elements.
GND2 and GND. The discrete capacitors provide ad-
ditional attenuation at frequencies below 400MHz.
Capacitors are safety rated type Y2, manufactured by
Murata, part #GA342QR7GF471KW01L.
L
is tied to V
RMS
CC
–10
–20
–30
60
50
40
30
20
10
Figure 1.DC1747A Radiated Emissions
0
on the demo
0
. The bridge
DETECTOR = QuasiPeak, R
V
NUMBER OF POINTS = 501
BW
1
= 300kHz, SWEEP TIME = 17s
2
3
FREQUENCY (MHz)
4
CISPR 22 CLASS B LIMIT
DC1747A-B
DC1747A-A
5
3. Minimized board/ground plane size. This reduces the
4. Optimized top signal routing and ground fl oods to reduce
5. Common mode fi ltering integrated into the input pin
6. A combination of low ESL and high ESR decoupling.
EMI performance is shown in Figure 1, measured using
a Gigahertz Transverse Electromagnetic (GTEM) cell and
method detailed in IEC 61000-4-20, “Testing and Mea-
surement Techniques – Emission and Immunity Testing
in Transverse Electromagnetic Waveguides.”
BW
6
dipole antenna formed between the logic side and
isolated side ground planes.
signal loops, minimizing differential mode radiation.
header and output DB9 connector. Filtering helps to
reduce emissions caused by conducted noise and
minimizes the effects of cabling to common mode
emissions.
A low ESL ceramic capacitor is located close to the
module minimizing high frequency noise conduction.
High ESR tantalum capacitors are included to minimize
board resonances and prevent voltage spikes due to hot
plugging of the input supply voltage.
= 120kHz,
7
8
DC1747A F01
9
10
dc1747af

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