DC1746A-A Linear Technology, DC1746A-A Datasheet - Page 15

• Manufacturer Part Number: DC1746A-A
• Description: EVALUATION KIT LOW EMI LTM2881-3
• Manufacturer: Linear Technology
• Series: µModuler

Specifications of DC1746A-A

• Main Purpose: Interface, Transceiver RS-422/RS-485
• Embedded: No
• Utilized Ic / Part: LTM2881
• Primary Attributes: 3V Supply, Isolated, Transceiver + Power
• Kit Contents: Board, Datasheet
• Tool / Board Applications: Interface-Backplane, PCI, PCI Express, RS-XXX, Digital & Opto Isolator
• Mcu Supported Families: LTM2881
• Development Tool Type: Hardware - Eval/Demo Board
• Lead Free Status / RoHS Status: Not applicable / Not applicable
• Secondary Attributes: -

APPLICATIONS INFORMATION
PCB Layout Considerations
The high integration of the LTM2881 makes PCB layout
very simple. However, to optimize its electrical isolation
characteristics, EMI, and thermal performance, some
layout considerations are necessary. The PCB layout in
Figure 15 shows a recommended configuration for a low
EMI RS485 application.
• Under heavily loaded conditions, V
• Input and Output decoupling is not required, since
• Hot plugging the LTM2881 voltage supply without ad-
• Do not place copper on the PCB between the inner col-
• The recommendation for non-EMI critical applications
can exceed 300mA. Use sufficient copper on the PCB to
ensure resistive losses do not cause the supply voltage
to drop below the minimum allowed level. Similarly,
size the V
external load current. These heavy copper traces will
also help to reduce thermal stress and improve the
thermal conductivity.
these components are integrated within the package.
If an additional decoupling capacitor is used a value of
6.8μF to 22μF is recommended. The recommendation
for EMI sensitive applications is to include an additional
low ESL ceramic capacitor of 1μF to 4.7μF , placed close
to the power and ground terminals. Alternatively, use a
number of smaller value parallel capacitors to reduce
ESL and achieve the same net capacitance.
ditional protection may cause device damage. Refer to
Linear Technology Application Note 88, entitled “Ceramic
Capacitors Can Cause Overvoltage Transients” for a
detailed discussion of this problem. To protect against
hot plug transients use a 6.8μF tantalum as the additional
decoupling capacitor.
umns of pads. This area must remain open to withstand
the rated isolation voltage. Slot the PCB in this area to
facilitate cleaning and ensure contamination does not
compromise the isolation voltage.
is to use solid ground planes for GND and GND2 for
optimizing signal fidelity, thermal performance, and to
minimize RF emissions due to uncoupled PCB trace
conduction. The drawback of using ground planes,
where EMI is of concern, is the creation of a dipole
CC2
and GND2 conductors to support any
CC
and GND current
• For large ground planes a small capacitance (≤ 330pF)
V
CC
antenna structure, which can radiate differential voltages
formed between GND and GND2. If ground planes are
used, minimize their area, and use contiguous planes,
any openings or splits can increase RF emissions.
from GND to GND2, either discrete or embedded within
the substrate, provides a low impedance current return
path for the module parasitic capacitance, minimizing
any high frequency differential voltages and substantially
reducing radiated emissions. Discrete capacitance is not
as effective due to parasitic ESL; in addition consider
voltage rating, leakage, and clearance for component
selection. Embedding the capacitance within the PCB
substrate provides a near ideal capacitor and eliminates
the other component selection issues, however the PCB
must be 4 layers and the use of a slot is not compatible.
Exercise care in applying either technique to insure the
voltage rating of the barrier is not compromised.
= V
= ON
RO
RE
DE
TE
DI
L
C1
GND
Figure 15. PCB Recommended Layout
LTM2881
2881 F15
15
2881fb
A
B
Y
Z