NCP1529ASNT1GEVB ON Semiconductor, NCP1529ASNT1GEVB Datasheet - Page 14

no-image

NCP1529ASNT1GEVB

Manufacturer Part Number
NCP1529ASNT1GEVB
Description
BOARD EVAL NCP1529
Manufacturer
ON Semiconductor
Datasheets

Specifications of NCP1529ASNT1GEVB

Design Resources
NCP1529ASNT1GEVB Schematic NCP1529ASNT1GEVB Gerber Files NCP1529ASNT1GEVB Bill of Materials
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Electrical Layout Considerations
requires respect of some rules to get a powerful portable
application. Good layout is key to prevent switching
regulators to generate noise to application and to
themselves.
Electrical layout guide lines are:
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
V
ORDERING INFORMATION
Specifications Brochure, BRD8011/D.
NCP1529ASNT1G
NCP1529MUTBG
NCP1529MU12TBG
NCP1529MU135TBG
GND Plane
Implementing a high frequency DC−DC converter
IN
Use short and large traces when large amount of current
is flowing.
Keep the same ground reference for input and output
capacitors to minimize the loop formed by high current
path from the battery to the ground plane.
Isolate feedback pin from the switching pin and the
current loop to protect against any external parasitic
signal coupling. Add a feed−forward capacitor between
V
participates to the good loop stability. A 18 pF
Figure 30. TSOP−5 Recommended Board Layout
Trace
OUT
and FB which adds a zero to the loop and
Device
FB Trace
EN Trace
Output Voltage
Nominal
1.35 V
1.2 V
Adj
Adj
LAYOUT CONSIDERATIONS
Trace
Trace
V
SW
OUT
http://onsemi.com
14
Marking
will help NCP1529 noise immunity and loop stability.
Thermal Layout Considerations
consideration such as:
requirements, UDFN6 package using exposed pad
connected to main radiator is recommended. Refer to
Notes 7, 8, and 9.
DXJ
RC
TC
TL
A four layer PCB with a ground plane and a power plane
High power dissipation in small package leads to thermal
For high ambient temperature and high power dissipation
capacitor is recommended to meet compensation
requirements.
Enlarge V
power plane.
Connect GND pin to top plane.
Join top, bottom and each ground plane together using
several free vias in order to increase radiator size.
Figure 31. UDFN6 Recommended Board Layout
FB Trace
V
IN
IN
Trace
trace and added several vias connected to
GND Plane
Package
TSOP−5
UDFN6
EN Trace
3000 / Tape & Reel
3000 / Tape & Reel
Shipping†
Trace
Trace
V
SW
OUT

Related parts for NCP1529ASNT1GEVB