SPB106-AP-1 H&D Wireless AB, SPB106-AP-1 Datasheet - Page 12

• Manufacturer Part Number: SPB106-AP-1
• Description: WIFI BRD W/RF ANTENNA 802.11B/G
• Manufacturer: H&D Wireless AB
• Type: Transceiver, 802.11 b/gr

Specifications of SPB106-AP-1

• Frequency: 2.4GHz
• Mcu Supported Families: AVR32
• Silicon Manufacturer: H&D Wireless
• Kit Contents: Board
• Features: Low Power Consumption, WEP And AES Hardware Encryption Accelerator Up To 128 Bits
• Core Architecture: Communication & Networking
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: HDG104
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Data Sheet - Preliminary
5 APPLICATION INFORMATION
SPB106 should be powered by a 3.3V supply.
The RESET pin is connected to HDG104 SHUTDOWN pin, and is active low. It should be set high
in normal operation.
Since it has an internal pull-up, it can be left unconnected. Pulling the SHUTDOWN pin low, set the
SPB106 in Shutdown mode. This turns OFF most parts of the circuit and minimizes the current
consumption. All I/O interface pins are set to predefined states (high, low or high-z) when in
Shutdown mode. To end Shutdown mode set SHUTDOWN pin high and reload FW and MIB.
Power save is a energy saving mode where SPB106 is only listening at regular intervals for the
beacons transmitted from an access point and is set in sleep mode in between. During this sleep
mode, FW is kept in RAM but all not needed functions are turned off. Since the receive time is very
short compared to the listening interval the average current consumption is reduced significantly.
The timing of the listening interval is based on the LFC (32 kHz) clock. The LFC is implemented
internally.
For detailed information regarding the power save function see the Application manual.
To communicate with the SPB106 the SPI or SDIO interface is used.
5.4.1 SPI interface
The SPI interface signals are connected to the host boards SPI bus. It can coexist with other SPI devices on
the same bus. The SPI_CS signal is the Chip Select signal, and it is implemented with a General Purpose
I/O pin.
The SPI bus signals on the Atmel AVR32 family processors use different pins for different parts in the family,
and depending on the application the processors can be configured to use different pins for SPI. As an
example for the UC3A the following configuration can be made:
Pin
1
2
3
4
5.1 Power Supply
5.2 Reset/Shutdown
5.3 Power save
5.4 Interfaces
Function
-
-
SPI_IRQ
RESET
Rev. PC3 06/2010
Pin on AVR32
-
-
Any GPIO pin, configured to generate interrupt.
(optional)
Any GPIO pin, put SPB106 in shutdown mode, reset.
(optional)
SPB106 WiFi SMD Board
Confidential
Data Sheet 1451-SPB106
Description
Not used
Not used
Interrupt
Shutdown
page 12 (23)