MMA5206W Freescale Semiconductor, MMA5206W Datasheet - Page 15

IC ACCELER 60G X-AXIS 16QFN

MMA5206W

Manufacturer Part Number
MMA5206W
Description
IC ACCELER 60G X-AXIS 16QFN
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MMA5206W

Sensing Axis
X
Acceleration
60 g
Sensitivity
0.125 g/LSB
Package / Case
QFN-16
Supply Voltage (max)
25 V
Supply Current
4 mA to 8 mA
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
3.1.3.8
specifications.
3.1.4
tion.
3.1.4.1
3.1.4.2
3.1.4.3
PSI5 transmission modes and time slots. Accepted time slot values are 0.5 μs to 511.5 μs in 0.5 μs increments. Care must be
taken to prevent from programming time slots which violate the PSI5 Version 1.3 specification, or time slots which will cause data
contention.
Note: TIMESLOTB is only used for Synchronous Double Sample Rate Mode and 16-Bit Resolution Mode.
Sensors
Freescale Semiconductor
Address
TRANS_MD[1]
$06
$07
$08
The baud rate selection bit selects one of two PSI5 baud rates as shown below. Reference
Device configuration registers 3, 4, and 5 are user programmable OTP registers which contain device configuration informa-
The PSI5 transmission mode selection bits select the PSI5 transmission mode as shown below.
The low pass filter selection bits select the low pass filter for the acceleration signal as described below:
The timeslot selection bits select the time slot(s) to be used for data transmission. Reference
TIMESLOTx[9:0]
Factory Default
00 0000 0000
Location
Non-Zero
0
0
1
1
Device Configuration Registers (DEVCFG3, DEVCFG4, DEVCFG5)
DEVCFG3
DEVCFG4
DEVCFG5
Register
Baud Rate Selection Bit (BAUD)
PSI5 Transmission Mode Selection Bits (TRANS_MD[1:0])
Low-Pass Filter Selection Bit (LPF[1:0])
TimeSlot Selection Bits (TIMESLOTx[9:0])
TIMESLOTA[7] TIMESLOTA[6] TIMESLOTA[5] TIMESLOTA[4] TIMESLOTA[3] TIMESLOTA[2] TIMESLOTA[1] TIMESLOTA[0]
TIMESLOTB[7] TIMESLOTB[6] TIMESLOTB[5] TIMESLOTB[4] TIMESLOTB[3] TIMESLOTB[2] TIMESLOTB[1] TIMESLOTB[0]
TRANS_MD[1]
TRANS_MD[0]
ASYNC Bit
7
0
0
1
0
1
N/A
0
1
TRANS_MD[0]
LPF[1]
0
0
1
1
6
0
Normal Mode (Asynchronous or Parallel, Synchronous)
BAUD
TimeSlot Definition from start of Sync Pulse (t
Default Time Slot (t
0
1
16-bit Resolution Mode (2 10-bit Responses)
Synchronous Double Sample Rate Mode
LPF[0]
LPF[1]
0
1
0
1
5
0
High Baud Rate (190.5 kBaud)
Low Baud Rate (125 kBaud)
Daisy Chain Mode
Operating Mode
TIMESLOT_DFLT
LPF[0]
Low Pass Filter Selected
Asynchronous Mode
Baud Rate
4
0
400 Hz, 3 Pole
400 Hz, 4 Pole
Time Slot
Bit
Reserved
Reserved
TIMESLOTB[9] TIMESLOTB[8] TIMESLOTA[9] TIMESLOTA[8]
) from start of Sync Pulse (t
3
0
TRIG
) in 0.5μs Increments
2
0
Section 2.6
Section 4.5
TRIG
)
Section 4.5.1.3
Section 4.5.1
Section 4.5.2
Section 4.5.4
for baud rate timing
1
0
for details regarding
Reference
Section 4.5.1.1
MMA52xxWR
Section 4.5
Section 4.5
Reference
0
0
15

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