LMC6572BIM National Semiconductor, LMC6572BIM Datasheet - Page 9
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LMC6572BIM
Manufacturer Part Number
LMC6572BIM
Description
IC, OP AMP, DUAL, 8SOIC
Manufacturer
National Semiconductor
Datasheet
1.LMC6572BIMXNOPB.pdf
(14 pages)
Specifications of LMC6572BIM
Op Amp Type
Low Voltage
No. Of Amplifiers
2
Bandwidth
220kHz
Slew Rate
0.09V/µs
Supply Voltage Range
2.7V To 11V
Amplifier Case Style
SOIC
No. Of Pins
8
Operating Temperature Range
-40°C To +85°C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Applications Hints
2.0 COMPENSATING FOR INPUT CAPACITANCE
It is quite common to use large values of feedback resis-
tance for amplifiers with ultra-low input current, like the
LMC6574/2.
Although the LMC6574/2 is highly stable over a wide range
of operating conditions, a large feedback resistor will react
even with small values of capacitance at the input of the
op-amp to reduce phase margin. The capacitance at the
input of the op-amp comes from transducers, photodiodes
and circuit board parasitics.
The effect of input capacitance can be compensated for by
adding a capacitor, C
Figure 1) such that:
or
Since it is often difficult to know the exact value of C
be experimentally adjusted so that the desired pulse re-
sponse is achieved. Refer to the LMC660 and LMC662 for a
more detailed discussion on compensating for input capaci-
tance.
When high input impedances are demanded, guarding of the
LMC6574/2 is suggested. Guarding input lines will not only
reduce leakage, but lowers stray input capacitance as well.
(See Printed-Circuit-Board Layout for High Impedance
Work).
3.0 CAPACITIVE LOAD TOLERANCE
Direct capacitive loading will reduce the phase margin of
many op-amps. A pole in the feedback loop is created by the
combination of the op-amp’s output impedance and the ca-
pacitive load. This pole induces phase lag at the unity-gain
crossover frequency of the amplifier resulting in either an
oscillatory or underdamped pulse response. With a few ex-
ternal components, op amps can easily indirectly drive ca-
pacitive loads, as shown in Figure 2.
FIGURE 1. Cancelling the Effect of Input Capacitance
f
, around the feedback resistors (as in
R
1
C
IN
≤ R
2
(Continued)
C
f
01193406
IN
, C
f
can
9
In the circuit of Figure 2, R1 and C1 serve to counteract the
loss of phase margin by feeding the high frequency compo-
nent of the output signal back to the amplifier’s inverting
input, thereby preserving phase margin in the overall feed-
back loop.
4.0 PRINTED-CIRCUIT-BOARD LAYOUT
FOR HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. When one wishes to take advantage
of the ultra-low bias current of the LMC6574/2, typically less
than 20 fA, it is essential to have an excellent layout. Fortu-
nately, the techniques of obtaining low leakages are quite
simple. First, the user must not ignore the surface leakage of
the PC board, even though it may sometimes appear accept-
ably low, because under conditions of high humidity or dust
or contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring
of foil completely surrounding the LMC6574/2’s inputs and
the terminals of capacitors, diodes, conductors, resistors,
relay terminals, etc. connected to the op-amp’s inputs, as in
Figure 3. To have a significant effect, guard rings should be
placed on both the top and bottom of the PC board. This PC
foil must then be connected to a voltage which is at the same
voltage as the amplifier inputs, since no leakage current can
flow between two points at the same potential. For example,
a PC board trace-to-pad resistance of 10
mally considered a very large resistance, could leak 5 pA if
the trace were a 5V bus adjacent to the pad of the input. This
would cause a 250 times degradation from the LMC6574/2’s
actual performance. However, if a guard ring is held within
5 mV of the inputs, then even a resistance of 10
cause only 0.05 pA of leakage current. See Figure 4 for
typical connections of guard rings for standard op-amp con-
figurations.
Amplifier, Compensated to Handle Capacitive Loads
FIGURE 2. LMC6574/2 Noninverting Gain of 10
12
Ω, which is nor-
01193407
www.national.com
11
Ω would