LT1058CN.#PBF Linear Technology, LT1058CN.#PBF Datasheet - Page 9

• Manufacturer Part Number: LT1058CN.#PBF
• Description: IC, OP AMP, QUAD JFET, 1058, DIP14
• Manufacturer: Linear Technology

Specifications of LT1058CN.#PBF

• Op Amp Type: High Speed
• No. Of Amplifiers: 4
• Bandwidth: 5MHz
• Slew Rate: 14V/µs
• Supply Voltage Range: ± 10V To ± 18V
• Amplifier Case Style: DIP
• No. Of Pins: 14
• Operating Temperature Range: 0°C To
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIO S I FOR ATIO
Settling time is measured in a test circuit which can
of all insulating surfaces to remove fluxes and other
residues will probably be required. Surface coating may be
necessary to provide a moisture barrier in high humidity
environments.
Board leakage can be minimized by encircling the input
circuitry with a guard ring operated at a potential close to
that of the inputs; in inverting configurations, the guard
ring should be tied to ground, in noninverting connec-
tions, to the inverting input. Guarding both sides of the
printed circuit board is required. Bulk leakage reduction
depends on the guard ring width.
The LT1057/LT1058 have the lowest offset voltage of
any dual and quad JFET input op amps available today.
However, the offset voltage and its drift with time and
temperature are still not as good as on the best bipolar
amplifiers (because the transconductance of FETs is
considerably lower than that of bipolar transistors).
Conversely, this lower transconductance is the main cause
of the significantly faster speed performance of FET input
op amps.
be found in the LT1055/LT1056 data sheet and in
Application Note 10.
Achieving Picoampere/Microvolt Performance
In order to realize the picoampere/microvolt level accuracy
of the LT1057/LT1058, proper care must be exercised. For
example, leakage currents in circuitry external to the op
amp can significantly degrade performance. High quality
insulation should be used (e.g., PTFE, Kel-F); cleaning
PTFE is a trademark of DuPont.
(A) ± 16V Sine Wave Input
U
U
All Photos 5V/Div Vertical Scale, 50µs/Div Horizontal Scale
W
U
(B) LF412A Output
Offset voltage also changes somewhat with temperature
cycling. The AM grades show a typical 40µV hysteresis
(50µV on the M grades) when cycled over the – 55°C to
125°C temperature range. Temperature cycling from 0°C
to 70°C has a negligible (less than 20µV) hysteresis effect.
The offset voltage and drift performance are also affected
by packaging. In the plastic N package, the molding
compound is in direct contact with the chip, exerting
pressure on the surface. While NPN input transistors are
largely unaffected by this pressure, JFET device drift is
degraded. Consequently for best drift performance, as
shown in the Typical Performance Characteristics distri-
bution plots, the J or H packages are recommended.
In applications where speed and picoampere bias currents
are not necessary, Linear Technology offers the bipolar
input, pin compatible LT1013 and LT1014 dual and quad
op amps. These devices have significantly better DC
specifications than any JFET input device.
Phase Reversal Protection
Most industry standard JFET input single, dual and quad
op amps (e.g., LF156, LF351, LF353, LF411, LF412,
OP-15, OP-16, OP-215, TL084) exhibit phase reversal at
the output when the negative common mode limit at the
input is exceeded (i.e., below – 12V with ± 15V supplies).
The photos below show a ± 16V sine wave input (A), the
response of an LF412A in the unity gain follower mode (B),
and the response of the LT1057/LT1058 (C).
The phase reversal of photo (B) can cause lock-up in servo
systems. The LT1057/LT1058 does not phase-reverse
due to a unique phase reversal protection circuit.
(C) LT1057/LT1058 Output
LT1057/LT1058
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