AS1540BQFT austriamicrosystems, AS1540BQFT Datasheet - Page 15
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AS1540BQFT
Manufacturer Part Number
AS1540BQFT
Description
IC, ADC, 12BIT, 50KSPS, TQFN-16
Manufacturer
austriamicrosystems
Datasheet
1.AS1538BTSU.pdf
(20 pages)
Specifications of AS1540BQFT
Resolution (bits)
12bit
Sampling Rate
50kSPS
Input Channel Type
Single Ended
Data Interface
2-Wire, I2C, Serial
Supply Voltage Range - Analog
2.7V To 5.25V
Supply Current
850µA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
AS1538/AS1540
Data Sheet - A p p l i c a t i o n I n f o r m a t i o n
Reading with Internal Reference On/Off
The internal reference defaults to off when the AS1538/AS1540 power is on. If the reference (internal or external) is
continuously turned on and off, a proper amount of settling time must be added before a normal conversion cycle can
be started. The exact amount of settling time needed varies depending on the reference capacitor. For example for a
reference capacitor of 4.7µF and considering the output impedance of the internal reference of 30Ω and the amount of
time to fully charge the capacitor will be 1.4ms. If the reference capacitor is not fully discharged this time can be
reduced greatly.
Figure 29
the mode when an internal reference is used.
Note: Typical read sequences can be re-used once the internal reference has settled.
Figure 29. Internal Reference Enable Sequence and Typical Read Sequence
Where:
A: Acknowledge (SDA Low)
N: Not Acknowledge (SDA High)
S: START Condition
P: STOP Condition
Sr: Repeated START Condition
W: 0 (Write)
R: 1 (Read)
X: Dont Care
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Sr
Sr
S
1
1
1
shows the correct internal reference enable sequence before issuing the typical read sequences required for
0
0
0
Read-Addressing Byte
Write-Addressing Byte
Write-Addressing Byte
ADC Conversion Mode
0
0
0
From Master to Slave
From Slave to Master
1
1
1
ADC Powerdown Mode
0
0
0
A1 A0
A1 A0
A1 A0
Internal-Reference Enable Sequence
W
W
R
A
A
A
SD C2 C1 C0
X
0
Typical Mode Read Sequence
Settled Internal Reference
Settled Internal Reference
X
0
X
Revision 1.03
0
Command Byte
Command Byte
X
0
D11 D10 D9 D8
2 x (8-bits +ACK/NACK
1
1 PD0 X
* Dependant on powerdown selection
bits PD0 and PD1.
** To remain in HS mode, use repeated
STARTs instead of STOPs
ADC Sampling Mode
X
ADC Powerdown Mode *
X
X
X
A
A
A
D7
P
Wait until required settling time reached
D6 ... D1
Enable Settling Time
Internal-Reference
D0
N
P
**
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