DS90C032TM National Semiconductor, DS90C032TM Datasheet - Page 7

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DS90C032TM

Manufacturer Part Number
DS90C032TM
Description
IC, DIFFERENTIAL LINE RECEIVER, SOP-16
Manufacturer
National Semiconductor
Datasheet

Specifications of DS90C032TM

Supply Current
10mA
Supply Voltage Range
4.5V To 5.5V
Driver Case Style
SOP
No. Of Pins
16
Operating Temperature Range
-40°C To +85°C
Device Type
Differential Line Receiver
Esd Hbm
3.5kV
Rohs Compliant
No
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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3.
4.
the cable is still present and floating, the unplugged cable
can become a floating antenna that can pick up noise.
The LVDS receiver is designed to detect very small
amplitude and width signals and recover them to
standard logic levels. Thus, if the cable picks up more
than 10mV of differential noise, the receiver may
respond. To insure that any noise is seen as common-
mode and not differential, a balanced interconnect and
twisted pair cables is recommended, as they help to
ensure that noise is coupled common to both lines and
rejected by the receivers.
Shorted Inputs. If a fault condition occurs that shorts
the receiver inputs together, thus resulting in a 0V
differential input voltage, the receiver output will remain
in a HIGH state. Shorted input fail-safe is not supported
across the common-mode range of the device (1.2V
±1V). It is only supported with inputs shorted and no
external common-mode voltage applied.
Operation in environment with greater than 10mV
differential noise.
National recommends external failsafe biasing on its
LVDS receivers for a number of system level and signal
7
The footprint of theDS90C032 is the same as the industry
standard 26LS32 Quad Differential (RS-422) Receiver.
quality reasons. First, only an application that requires
failsafe biasing needs to employ it. Second, the amount
of failsafe biasing is now an application design parameter
and can be custom tailored for the specific application. In
applications in low noise environments, they may choose
to use a very small bias if any. For applications with less
balanced interconnects and/or in high noise
environments they may choose to boost failsafe further.
Nationals "LVDS Owner’s Manual provides detailed
calculations for selecting the proper failsafe biasing
resistors. Third, the common-mode voltage is biased by
the resistors during the un-driven state. This is selected
to be close to the nominal driver offset voltage (V
Thus when switching between driven and un-driven
states, the common-mode modulation on the bus is held
to a minimum.
For additional Failsafe Biasing information, please refer
to Application Note AN-1194 for more detail.
www.national.com
OS
).

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