LFE2-6E-5TN144C LATTICE SEMICONDUCTOR, LFE2-6E-5TN144C Datasheet - Page 110
![IC, LATTICEECP2 FPGA, 420MHZ, TQFP-144](/photos/19/4/190417/4657533_sml.jpg)
LFE2-6E-5TN144C
Manufacturer Part Number
LFE2-6E-5TN144C
Description
IC, LATTICEECP2 FPGA, 420MHZ, TQFP-144
Manufacturer
LATTICE SEMICONDUCTOR
Series
LatticeECP2r
Datasheet
1.LFE2-12E-5FN256C.pdf
(385 pages)
Specifications of LFE2-6E-5TN144C
No. Of Logic Blocks
6000
No. Of Macrocells
3000
No. Of Speed Grades
5
No. Of I/o's
90
Clock Management
DLL, PLL
I/o Supply Voltage
3.465V
Total Ram Bits
55Kbit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LFE2-6E-5TN144C
Manufacturer:
LATTICE
Quantity:
3
Company:
Part Number:
LFE2-6E-5TN144C
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
LFE2-6E-5TN144C
Manufacturer:
LATTICE
Quantity:
20 000
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Lattice Semiconductor
LatticeECP2 Pin Information Summary, LFE2-50 and LFE2-70 (Cont.)
Available DDR-Interfaces per I/O
Bank
PCI Capable I/Os per Bank
1. Minimum requirement to implement a fully functional 8-bit wide DDR bus. Available DDR interface consists of at least 12 I/Os (1 DQS + 1
DQSB + 8 DQs + 1 DM + Bank VREF1).
1
Pin Type
Bank0
Bank1
Bank2
Bank3
Bank4
Bank5
Bank6
Bank7
Bank8
Bank0
Bank1
Bank2
Bank3
Bank4
Bank5
Bank6
Bank7
Bank8
4-10
484 fpBGA
46
46
0
0
2
0
3
3
1
2
0
0
0
0
0
0
0
0
LFE2-50
LatticeECP2/M Family Data Sheet
672 fpBGA
62
68
0
0
3
3
4
4
4
3
0
0
0
0
0
0
0
0
672 fpBGA
Pinout Information
62
68
0
0
3
3
4
4
4
3
0
0
0
0
0
0
0
0
LFE2-70
900 fpBGA
72
80
0
0
4
3
4
5
4
4
0
0
0
0
0
0
0
0
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