NTE6664 NTE ELECTRONICS, NTE6664 Datasheet

NTE6664

Manufacturer Part Number

NTE6664

Description

IC, DRAM, 64KBIT, DIP-16

Manufacturer

NTE ELECTRONICS

Datasheet

1.NTE6664.pdf (5 pages)

Specifications of NTE6664

Memory Type

DRAM

Access Time

150ns

Page Size

64Kbit

Memory Case Style

DIP

No. Of Pins

Operating Temperature Range

0Â°C To +70Â°C

Mounting Type

Through Hole

Memory Size

64Kbit

Package / Case

16-DIP

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Description:

The NTE6664 is a 65,536 Bit, high–speed, dynamic Random Access Memory. Organized as 65,536

one–bit words and fabricated using HMOS high–performance N–Channel silicon–gate technology,

this 5V only dynamic RAM combines high performance with low cost and improved reliability.

By multiplying row– and column– address inputs, the NTE6664 requires only eight address lines and

permits packaging in a standard 16–Lead DIP package. Complete address decoding is done on chip

with address latches incorporated. Data out is controlled by CAS allowing for greater system flexibility.

All inputs and outputs, including clocks, are fully TTL compatible. The NTE6664 incorporates a one–

transistor cell design and dynamic storage techniques. In addition to the RAS–only refresh mode,

the refresh control function available on Pin1 provides two additional modes of refresh, automatic and

self refresh.

Features:

D Single +5V Operation ( 10%)

D Maximum Access Time: 150ns

D Low Power Dissipation:

D Three State Data Output

D Early–Write Common I/O Capability

Absolute Maximum Ratings: (Note 1)

Voltage on V

Voltage Relative to V

Data Out Current (Short Circuit), I

Power Dissipation, P

Operating Temperature Range, T

Storage Temperature Range, T

Note 1. Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.

302.5mW Max (Active)

22mW Max (Standby)

Functional operation should be restricted to RECOMMENDED OPERATING CONDITIONS.

Exposure to higher than recommended voltages for extended periods of time could affect

the device reliability.

Supply Relative to V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

for Any Pin Except V

stg

64K–Bit Dynamic RAM

out

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Integrated Circuit

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

, V

NTE6664

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

, V

D 128 Cycle, 2ms Refresh

D Control on Pin1 for Automatic or Self Refresh

D RAS–Only Refresh Mode

D CAS Controlled Output

D Fast Page Mode Cycle Time

D Low Soft Error Rate: < 0.1% per 1000 Hrs

, V

out

. . . . . . . . . . . . . . . . . . . . . . . . . . .

–65 to +150 C

0 to +70 C

–2 to +7V

–1 to +7V

50mA

Related parts for NTE6664

NTE6664 Summary of contents

Page 1

... Data out is controlled by CAS allowing for greater system flexibility. All inputs and outputs, including clocks, are fully TTL compatible. The NTE6664 incorporates a one– transistor cell design and dynamic storage techniques. In addition to the RAS–only refresh mode, the refresh control function available on Pin1 provides two additional modes of refresh, automatic and self refresh ...

Page 2

Recommended Operating Conditions: (Note 2, T Supply Voltage (Operating Voltage Range) Logic 1 Voltage, All Inputs Logic 0 Voltage, All Inputs (Note 3) Note 2. All voltages referenced to V Note 3. The device will withstand undershoots to the –2V ...

Page 3

Read, Write, and Read–Modify–Write Cycles (Cont’d): (V Parameter RAS to CAS Delay Time Row Address Setup Time Row Address Hold Time Column Address Setup Time Column Address Hold Time Column Address Hold Time Referenced to RAS Transition Time (Rise and ...

Page 4

Note 8. The transition time specification applies for all input signals. In addition to meeting the transi- tion rate specification, all input signals must transmit between V and monotonic manner. IH Note 9. The specification for ...

Page 5

Pin Connection Diagram 1 * REFRESH RAS pin is not used, it should be connected .870 (22.0) Max .100 (2.54) ...

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