S29AL008J70BFI020 Spansion Inc., S29AL008J70BFI020 Datasheet - Page 15

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S29AL008J70BFI020

Manufacturer Part Number
S29AL008J70BFI020
Description
IC, FLASH, 8MBIT, 70NS, BGA-48
Manufacturer
Spansion Inc.
Datasheet

Specifications of S29AL008J70BFI020

Memory Type
Flash
Memory Size
8Mbit
Memory Configuration
1M X 8 / 512K X 16
Ic Interface Type
CFI, Parallel
Access Time
70ns
Supply Voltage Range
2.7 To 3.6 V
Memory Case Style
BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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7.3
7.4
7.5
February 23, 2010 S29AL008J_00_09
Writing Commands/Command Sequences
Program and Erase Operation Status
Standby Mode
on the device address inputs produce valid data on the device data outputs. The device remains enabled for
read access until the command register contents are altered.
See
timing specifications and to
on page 40
To write a command or command sequence (which includes programming data to the device and erasing
sectors of memory), the system must drive WE# and CE# to V
For program operations, the BYTE# pin determines whether the device accepts program data in bytes or
words. See
The device features an Unlock Bypass mode to facilitate faster programming. Once the device enters the
Unlock Bypass mode, only two write cycles are required to program a word or byte, instead of four.
Byte Program Command Sequence on page 29
standard and Unlock Bypass command sequences.
An erase operation can erase one sector, multiple sectors, or the entire device.
Table 7.4 on page 18
the address bits required to uniquely select a sector. The
erasing a sector or the entire chip, or suspending/resuming the erase operation.
After the system writes the autoselect command sequence, the device enters the autoselect mode. The
system can then read autoselect codes from the internal register (which is separate from the memory array)
on DQ7–DQ0. Standard read cycle timings apply in this mode. Refer to
Autoselect Command Sequence on page 28
I
Characteristics on page 42
During an erase or program operation, the system may check the status of the operation by reading the
status bits on DQ7–DQ0. Standard read cycle timings and I
Operation Status on page 34
When the system is not reading or writing to the device, it can place the device in the standby mode. In this
mode, current consumption is greatly reduced, and the outputs are placed in the high impedance state,
independent of the OE# input.
The device enters the CMOS standby mode when the CE# and RESET# pins are both held at V
(Note that this is a more restricted voltage range than V
V
requires standard access time (t
before it is ready to read data.
If the device is deselected during erasure or programming, the device draws active current until the operation
is completed.
I
on page
CC2
CC3
CC
Reading Array Data on page 28
± 0.3 V, the device will be in the standby mode, but the standby current will be greater. The device
and I
in
DC Characteristics on page 40
40.
CC4
represents the active current specification for reading array data.
Word/Byte Configuration on page 14
represents the standby current specification shown in the table in
indicate the address space that each sector occupies. A “sector address” consists of
D a t a
contains timing specification tables and timing diagrams for write operations.
Figure 17.1 on page 42
for more information, and to
CE
) for read access when the device is in either of these standby modes,
S h e e t
for more information. Refer to the AC
represents the active current specification for the write mode.
S29AL008J
for more information.
has details on programming data to the device using both
for more information.
for the timing diagram. I
IH
.) If CE# and RESET# are held at V
Command Definitions on page 28
AC Characteristics on page 42
CC
IL
read specifications apply. Refer to
, and OE# to V
Autoselect Mode on page 19
Read Operations on page 42
CC1
IH
DC Characteristics
Table 7.2 on page 17
in
.
DC Characteristics
for timing diagrams.
has details on
IH
, but not within
CC
Write
± 0.3 V.
Word/
AC
and
and
for
15

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