S29GL032N90TFI040 Spansion Inc., S29GL032N90TFI040 Datasheet - Page 44

• Manufacturer Part Number: S29GL032N90TFI040
• Description: IC, FLASH, 32MBIT, 90NS, TSOP-48
• Manufacturer: Spansion Inc.

Specifications of S29GL032N90TFI040

• Memory Type: Flash
• Memory Size: 32Mbit
• Ic Interface Type: CFI, Parallel
• Access Time: 90ns
• Supply Voltage Range: 2.7V To 3.6V
• Memory Case Style: TSOP
• No. Of Pins: 48
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

44
10.4.4
Accelerated Program
The abort condition is indicated by DQ1 = 1, DQ7 = DATA# (for the last address location loaded), DQ6 =
toggle, and DQ5= 0. A Write-to-Buffer-Abort Reset command sequence must be written to reset the device
for the next operation.
Note that the Secured Silicon Sector, autoselect, and CFI functions are unavailable when a program
operation is in progress. This flash device is capable of handling multiple write buffer programming operations
on the same write buffer address range without intervening erases. For applications requiring incremental bit
programming, a modified programming method is required; please contact your local Spansion
representative. Any bit in a write buffer address range cannot be programmed from 0 back to a 1.
Attempting to do so may cause the device to set DQ5=1, of cause the DQ7 and DQ6 status bits to indicate
the operation was successful. However, a succeeding read shows that the data is still 0. Only erase
operations can convert a 0 to a 1.
The device offers accelerated program operations through the WP#/ACC or ACC pin depending on the
particular product. When the system asserts V
voltage on the WP#/ACC or ACC pin to accelerate the operation. Note that the WP#/ACC pin must not be at
V
internal pull-up; when unconnected, WP# is at V
Figure 10.1 on page 45
Operations–AC Characteristics on page 64
HH
Write an Address/Data pair to a different write-buffer-page than the one selected by the Starting Address
during the write buffer data loading stage of the operation.
Write data other than the Confirm Command after the specified number of data load cycles.
for operations other than accelerated programming, or device damage may result. WP# contains an
illustrates the algorithm for the program operation. Refer to the Erase and Program
S29GL-N MirrorBit
for parameters, and
D a t a
HH
®
IH
Flash Family
on the WP#/ACC or ACC pin. The device uses the higher
.
S h e e t
Figure 15.3 on page 65
S29GL-N_01_12 October 29, 2008
for timing diagrams.