BS62LV1027SIP55 BSI (BRILLIANCE SEMICONDUCTOR), BS62LV1027SIP55 Datasheet - Page 2

SRAM 1M, 128KX8, 2.4-5.5V, SOP32

BS62LV1027SIP55

Manufacturer Part Number
BS62LV1027SIP55
Description
SRAM 1M, 128KX8, 2.4-5.5V, SOP32
Manufacturer
BSI (BRILLIANCE SEMICONDUCTOR)
Datasheet

Specifications of BS62LV1027SIP55

Memory Size
1Mbit
Access Time
55ns
Supply Voltage Range
2.4V To 5.5V
Memory Case Style
SOP
No. Of Pins
32
Operating Temperature Range
-40°C To +85°C
Operating Temperature Max
85°C
Operating
RoHS Compliant

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Part Number
Manufacturer
Quantity
Price
Part Number:
BS62LV1027SIP55
Manufacturer:
BSI
Quantity:
2 191
Part Number:
BS62LV1027SIP55-TR
Manufacturer:
IDT
Quantity:
101
n PIN DESCRIPTIONS
n TRUTH TABLE
n ABSOLUTE MAXIMUM RATINGS
R0201-BS62LV1027
1. Stresses greater than those listed under ABSOLUTE
2. –2.0V in case of AC pulse width less than 30 ns.
SYMBOL
MAXIMUM RATINGS may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at these or any other conditions above those
indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for
extended periods may affect reliability.
A0-A16 Address Input
CE1 Chip Enable 1 Input
CE2 Chip Enable 2 Input
WE Write Enable Input
OE Output Enable Input
DQ0-DQ7 Data Input/Output
Ports
V
GND
V
T
T
I
CC
TERM
P
OUT
BIAS
STG
Output Disabled
(Power Down)
T
Not selected
MODE
Read
Write
Terminal Voltage with
Respect to GND
Temperature Under
Bias
Storage Temperature
Power Dissipation
DC Output Current
PARAMETER
Name
CE1
H
X
L
L
L
-0.5
-40 to +125
-60 to +150
RATING
(2)
1.0
(1)
20
to 7.0
CE2
H
H
H
X
L
These 17 address inputs select one of the 131,072 x 8-bit in the RAM
CE1 is active LOW and CE2 is active HIGH. Both chip enables must be active when
data read form or write to the device. If either chip enable is not active, the device is
deselected and is in standby power mode. The DQ pins will be in the high impedance
state when the device is deselected.
The write enable input is active LOW and controls read and write operations. With the
chip selected, when WE is HIGH and OE is LOW, output data will be present on the
DQ pins; when WE is LOW, the data present on the DQ pins will be written into the
selected memory location.
The output enable input is active LOW. If the output enable is active while the chip is
selected and the write enable is inactive, data will be present on the DQ pins and they
will be enabled. The DQ pins will be in the high impendence state when OE is inactive.
There 8 bi-directional ports are used to read data from or write data into the RAM.
Power Supply
Ground
UNITS
mA
O
O
W
V
C
C
WE
X
X
H
H
L
2
n OPERATING RANGE
n CAPACITANCE
1. This parameter is guaranteed and not 100% tested.
SYMBOL PAMAMETER CONDITIONS MAX. UNITS
C
C
Commercial
IO
Industrial
IN
OE
RANG
H
X
X
X
L
Input
Capacitance
Input/Output
Capacitance
Function
I/O OPERATION
(1)
TEMPERATURE
(T
-40
High Z
High Z
0
D
A
O
AMBIENT
D
O
C to + 70
OUT
= 25
IN
C to + 85
V
O
V
BS62LV1027
C, f = 1.0MHz)
I/O
IN
O
= 0V
= 0V
C
O
C
V
CC
I
CCSB
Revision
May.
CURRENT
2.4V ~ 5.5V
2.4V ~ 5.5V
6
8
I
I
I
, I
CC
CC
CC
V
CCSB1
CC
pF
pF
2006
2.3

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