PIC16LF1827-I/ML Microchip Technology, PIC16LF1827-I/ML Datasheet - Page 226

• Manufacturer Part Number: PIC16LF1827-I/ML
• Description: IC, 8BIT MCU, PIC16LF, 32MHZ, QFN-28
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 16Fr

Specifications of PIC16LF1827-I/ML

• Controller Family/series: PIC16LF
• Eeprom Memory Size: 256Byte
• Ram Memory Size: 384Byte
• Cpu Speed: 32MHz
• No. Of Timers: 5
• Interface: EUSART, I2C, SPI
• Core Size: 8 Bit
• Program Memory Size: 4kWords
• Core Processor: PIC
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 256 x 8
• Ram Size: 384 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
• Processor Series: PIC16LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 32 KHz
• Number Of Programmable I/os: 16
• Number Of Timers: 5
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 12 Channel
• On-chip Dac: 5 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

PIC16F/LF1826/27
23.4.6.1
The STRxSYNC bit of the PSTRxCON register gives
the user two selections of when the steering event will
happen. When the STRxSYNC bit is ‘0’, the steering
event will happen at the end of the instruction that
writes to the PSTRxCON register. In this case, the
output signal at the Px<D:A> pins may be an
incomplete PWM waveform. This operation is useful
when the user firmware needs to immediately remove
a PWM signal from the pin.
When the STRxSYNC bit is ‘1’, the effective steering
update will happen at the beginning of the next PWM
period. In this case, steering on/off the PWM output will
always produce a complete PWM waveform.
Figures 12-19 and 12-20 illustrate the timing diagrams
of the PWM steering depending on the STRxSYNC
setting.
23.4.7
When any PWM mode is used, the application
hardware must use the proper external pull-up and/or
pull-down resistors on the PWM output pins.
The CCPxM<1:0> bits of the CCPxCON register allow
the user to choose whether the PWM output signals are
active-high or active-low for each pair of PWM output
pins (PxA/PxC and PxB/PxD). The PWM output
polarities must be selected before the PWM pin output
drivers
FIGURE 23-19:
FIGURE 23-20:
DS41391C-page 226
P1<D:A>
P1<D:A>
STRx
PWM
STRx
PWM
are
START-UP CONSIDERATIONS
Steering Synchronization
enabled.
PORT Data
EXAMPLE OF STEERING EVENT AT END OF INSTRUCTION (STRxSYNC = 0)
EXAMPLE OF STEERING EVENT AT BEGINNING OF INSTRUCTION
(STRxSYNC = 1)
Changing
PWM Period
PORT Data
the
polarity
Preliminary
P1n = PWM
configuration while the PWM pin output drivers are
enable is not recommended since it may result in
damage to the application circuits.
The PxA, PxB, PxC and PxD output latches may not be
in the proper states when the PWM module is
initialized. Enabling the PWM pin output drivers at the
same time as the Enhanced PWM modes may cause
damage to the application circuit. The Enhanced PWM
modes must be enabled in the proper Output mode and
complete a full PWM cycle before enabling the PWM
pin output drivers. The completion of a full PWM cycle
is indicated by the TMRxIF bit of the PIRx register
being set as the second PWM period begins.
23.4.8
This module incorporates I/O pins that can be moved to
other locations with the use of the alternate pin function
registers, APFCON0 and APFCON1. To determine
which pins can be moved and what their default loca-
tions are upon a Reset, see Section 12.1 “Alternate
Pin Function” for more information.
P1n = PWM
Note:
When the microcontroller is released from
Reset, all of the I/O pins are in the
high-impedance state. The external cir-
cuits must keep the power switch devices
in the Off state until the microcontroller
drives the I/O pins with the proper signal
levels or activates the PWM output(s).
ALTERNATE PIN LOCATIONS
PORT Data
 2010 Microchip Technology Inc.
PORT Data