ATTINY261A-PU Atmel, ATTINY261A-PU Datasheet - Page 69
ATTINY261A-PU
Manufacturer Part Number
ATTINY261A-PU
Description
IC, MCU, 8BIT, 2K FLASH, 20PDIP
Manufacturer
Atmel
Datasheet
1.ATTINY461A-MU.pdf
(292 pages)
Specifications of ATTINY261A-PU
Controller Family/series
ATtiny
No. Of I/o's
16
Eeprom Memory Size
128Byte
Ram Memory Size
128Byte
Cpu Speed
20MHz
No.
RoHS Compliant
Core Size
8bit
Program Memory Size
2KB
Oscillator Type
External, Internal
Rohs Compliant
Yes
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11. Timer/Counter0
11.1
11.2
11.2.1
8197B–AVR–01/10
Features
Overview
Registers
•
•
•
•
•
Timer/Counter0 is a general purpose 8/16-bit Timer/Counter module, with two/one Output Com-
pare units and Input Capture feature.
The general operation of Timer/Counter0 is described in 8/16-bit mode. A simplified block dia-
gram of the 8/16-bit Timer/Counter is shown in
including I/O bits and I/O pins, are shown in bold. For actual placement of I/O pins, refer to
out ATtiny261A/461A/861A” on page
in the
Figure 11-1. 8-/16-bit Timer/Counter Block Diagram
The Timer/Counter0 Low Byte Register (TCNT0L) and Output Compare Registers (OCR0A and
OCR0B) are 8-bit registers. Interrupt request (abbreviated Int.Req. in
Clear Timer on Compare Match (Auto Reload)
One Input Capture unit
Four Independent Interrupt Sources (TOV0, OCF0A, OCF0B, ICF0)
8-bit Mode with Two Independent Output Compare Units
16-bit Mode with One Independent Output Compare Unit
“Register Description” on page
TCCRnA
TCNTnH
OCRnB
=
Timer/Counter
Direction
Count
Clear
TCNTnL
TCCRnB
OCRnA
=
82.
2. Device-specific I/O Register and bit locations are listed
Control Logic
TOP
Figure
Detector
Edge
clk
=
Tn
11-1. CPU accessible I/O Registers,
Canceler
Fixed TOP value
( From Prescaler )
Noise
Figure
Clock Select
Detector
Edge
TOVn (Int. Req.)
11-1) signals are all
Comparator Ouput )
OCnA (Int. Req.)
OCnB (Int. Req.)
ICFn (Int. Req.)
( From Analog
ICPn
Tn
“Pin-
69
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