JN5148-001 Jennic LTD, JN5148-001 Datasheet - Page 35

• Manufacturer Part Number: JN5148-001
• Description: 32BIT, MCU, ZIGBEE PRO, 128K RAM, 56QFN
• Manufacturer: Jennic LTD

Specifications of JN5148-001

• No. Of I/o's: 21
• Eeprom Memory Size: 128KB
• Ram Memory Size: 128KB
• Cpu Speed: 32MHz
• No. Of Timers: 3
• No. Of Pwm Channels: 3
• Digital Ic Case Style: QFN
• Core Size: 32bit
• Oscillator Type: External
• Peripherals: ADC, DAC, PWM, Timer
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

sent from a slave, it should perform transmit using dummy data. An interrupt can be generated when the transaction
has completed or alternatively the interface can be polled.
If a slave device wishes to signal the JN5148 indicating that it has data to provide, it may be connected to one of the
DIO pins that can be enabled as an interrupt.
Figure 21 shows a complex SPI transfer, reading data from a FLASH device, that can be achieved using the SPI
master interface. The slave select line must stay low for many separate SPI accesses, and therefore manual slave
select mode must be used. The required slave select can then be asserted (active low) at the start of the transfer. A
sequence 8 and 32 bit transfers can be used to issue the command and address to the FLASH device and then to
read data back. Finally, the slave select can be deselected to end the transaction.
© Jennic 2009
SPIMOSI
SPIMISO
SPIMOSI
SPIMISO
SPISEL
SPICLK
SPISEL
SPICLK
Figure 21: Example SPI Waveforms – Reading from FLASH device using Mode 0
MSB
0
7
0
1
6
1
2
5
2
Instruction (0x03)
3
Byte 1
4
3
4
JN-DS-JN5148-001 1v2
3
4
Read Data Bytes Transaction(s) 1-N
5
Preliminary
2
5
value unused by peripherals
Instruction Transaction
6
1
6
7
0
7
MSB
MSB
8
23
7
8
Byte 2
9
22
6
9
10
21
5
10
24-bit Address
3
3
28
Byte N
2
2
29
1
1
30
LSB
8N-1
Jennic
0
0
31
35