LT3991EMSE-5#PBF Linear Technology, LT3991EMSE-5#PBF Datasheet - Page 18

• Manufacturer Part Number: LT3991EMSE-5#PBF
• Description: IC, DC-DC CONV, 2MHz, MSOP10
• Manufacturer: Linear Technology

Specifications of LT3991EMSE-5#PBF

• Primary Input Voltage: 55V
• No. Of Outputs: 1
• Output Voltage: 5V
• Output Current: 1.2A
• No. Of Pins: 10
• Operating Temperature Range: -40°C To +125°C
• Peak Reflow Compatible (260 C): Yes
• Msl: MSL 1 - Unlimited
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

APPLICATIONS INFORMATION
LT3991/LT3991-3.3/LT3991-5
Figure 8. Diode D4 Prevents a Shorted Input from Discharging a
Backup Battery Tied to the Output. It Also Protects the Circuit from
a Reversed Input. The LT3991 Runs Only When the Input is Present
PCB Layout
For proper operation and minimum EMI, care must be taken
during printed circuit board layout. Figure 9 shows the
recommended component placement with trace, ground
plane and via locations. Note that large, switched currents
flow in the LT3991’s V
(D1), and the input capacitor (C1). The loop formed by
these components should be as small as possible. These
components, along with the inductor and output capacitor,
should be placed on the same side of the circuit board,
and their connections should be made on that layer. Place
a local, unbroken ground plane below these components.
The SW and BOOST nodes should be as small as possible.
Finally, keep the FB and R
traces will shield them from the SW and BOOST nodes.
The Exposed Pad on the bottom of the package must be
soldered to ground so that the pad acts as a heat sink. To
keep thermal resistance low, extend the ground plane as
much as possible, and add thermal vias under and near
the LT3991 to additional ground planes within the circuit
board and on the bottom side.
Hot Plugging Safely
The small size, robustness and low impedance of ceramic
capacitors make them an attractive option for the input
bypass capacitor of LT3991 circuits. However, these ca-
pacitors can cause problems if the LT3991 is plugged into
a live supply. The low loss ceramic capacitor, combined
with stray inductance in series with the power source,
forms an under damped tank circuit, and the voltage at
18
V
IN
MBRS140
D4
V
EN
GND
IN
LT3991
BOOST
IN
T
FB
SW
BD
and SW pins, the catch diode
nodes small so that the ground
3991 F07
+
BACKUP
V
OUT
the V
input voltage, possibly exceeding the LT3991’s rating and
damaging the part. If the input supply is poorly controlled
or the user will be plugging the LT3991 into an energized
supply, the input network should be designed to prevent
this overshoot. See Linear Technology Application Note
88 for a complete discussion.
High Temperature Considerations
For higher ambient temperatures, care should be taken in
the layout of the PCB to ensure good heat sinking of the
LT3991. The Exposed Pad on the bottom of the package
must be soldered to a ground plane. This ground should be
tied to large copper layers below with thermal vias; these
layers will spread heat dissipated by the LT3991. Placing
additional vias can reduce thermal resistance further. The
maximum load current should be derated as the ambient
temperature approaches the maximum junction rating.
Power dissipation within the LT3991 can be estimated by
calculating the total power loss from an efficiency measure-
ment and subtracting the catch diode loss and inductor
Figure 9. A Good PCB Layout Ensures Proper, Low EMI Operation
VIAS TO LOCAL GROUND PLANE
VIAS TO V
IN
pin of the LT3991 can ring to twice the nominal
D1
OUT
C3
L1
VIAS TO SYNC
C1
V
OUT
GND
VIAS TO RUN/SS
VIAS TO PG
C2
C5
C4
R
VIAS TO V
R1
OUTLINE OF LOCAL
GROUND PLANE
PG
R2
R
IN
T
GND
3991fa
3991 F09