NRF24L01G NORDIC SEMICONDUCTOR, NRF24L01G Datasheet - Page 58

• Manufacturer Part Number: NRF24L01G
• Description: IC, RF TRANSCEIVER, 2.4-2.4835GHZ QFN-20
• Manufacturer: NORDIC SEMICONDUCTOR

Specifications of NRF24L01G

• Transmitting Current: 11.3mA
• Data Rate: 2Mbps
• Frequency Range: 2.4GHz To 2.4835GHz
• Modulation Type: GFSK
• Sensitivity Dbm: -82dBm
• Rf Ic Case Style: QFN
• No. Of Pins: 20
• Sensitivity (dbm): -82dBm
• Supply Voltage Range: 1.9V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Revision 2.0
Address
(Hex)
a. This is the time the PTX is waiting for an ACK packet before a retransmit is made. The PTX is in RX mode
b. The
c. To activate this feature use the
d. If ACK packet payload is activated, ACK packets have dynamic payload lengths and the Dynamic Pay-
N/A
1C
1D
for a minimum of 250µS, but it stays in RX mode to the end of the packet if that is longer than 250µS. Then
it goes to standby-I mode for the rest of the specified ARD. After the ARD it goes to TX mode and then
retransmits the packet.
should be: 1) read payload through SPI, 2) clear
are more payloads available in RX FIFO, 4) if there are more data in RX FIFO, repeat from 1)
in the
load Length feature should be enabled for pipe 0 on the PTX and PRX. This is to ensure that they receive
the ACK packets with payloads. If the payload in ACK is more than 15 byte in 2Mbps mode the ARD must
be 500µS or more, and if the payload is more than 5byte in 1Mbps mode the ARD must be 500µS or more.
RX_DR
FEATURE
EN_ACK_PAY
EN_DYN_ACK
Mnemonic
FEATURE
Reserved
Reserved
RX_PLD
DPL_P5
DPL_P4
DPL_P3
DPL_P2
DPL_P1
DPL_P0
EN_DPL
DYNPD
IRQ is asserted by a new packet arrival event. The procedure for handling this interrupt
register must be set.
c
c
d
255:0
Bit
7:6
7:3
5
4
3
2
1
0
2
1
0
ACTIVATE
Table 24. Register map of nRF24L01
Reset
Value
X
0
0
0
0
0
0
0
0
0
0
0
Page 58 of 74
SPI command followed by data 0x73. The corresponding bits
Type
RX_DR
R/W Only ‘00’ allowed
R/W Enable dyn. payload length data pipe 5.
R/W Enable dyn. payload length data pipe 4.
R/W Enable dyn. payload length data pipe 3.
R/W Enable dyn. payload length data pipe 2.
R/W Enable dyn. payload length data pipe 1.
R/W Enable dyn. payload length data pipe 0.
R/W Feature Register
R/W Only ‘00000’ allowed
R/W Enables Dynamic Payload Length
R/W Enables Payload with ACK
R/W Enables the W_TX_PAYLOAD_NOACK command
R
Read by separate SPI command
RX data payload register. 1 - 32 bytes.
This register is implemented as a FIFO with
three levels.
All RX channels share the same FIFO
Enable dynamic payload length
(Requires EN_DPL and ENAA_P5)
(Requires EN_DPL and ENAA_P4)
(Requires EN_DPL and ENAA_P3)
(Requires EN_DPL and ENAA_P2)
(Requires EN_DPL and ENAA_P1)
(Requires EN_DPL and ENAA_P0)
IRQ, 3) read
nRF24L01 Product Specification
FIFO_STATUS
Description
to check if there