CS4340-KS Cirrus Logic Inc, CS4340-KS Datasheet - Page 3
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CS4340-KS
Manufacturer Part Number
CS4340-KS
Description
D/A Converter (D-A) IC
Manufacturer
Cirrus Logic Inc
Specifications of CS4340-KS
Resolution (bits)
24bit
Data Interface
Serial
No. Of Pins
16
Update Rate
96kSPS
Mounting Type
Surface Mount
Peak Reflow Compatible (260 C)
No
Supply Voltage Max
5V
No. Of Bits
24 Bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CS4340-KS
Manufacturer:
CIRRUS
Quantity:
262
Part Number:
CS4340-KS
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
CS4340-KS EP
Manufacturer:
CIRRUS
Quantity:
20 000
Company:
Part Number:
CS4340-KSEP
Manufacturer:
HARRIS
Quantity:
1 200
Company:
Part Number:
CS4340-KSR
Manufacturer:
Optek
Quantity:
1
Company:
Part Number:
CS4340-KSZ
Manufacturer:
CIRRUS
Quantity:
443
Part Number:
CS4340-KSZ
Manufacturer:
CIRRUS
Quantity:
20 000
Company:
Part Number:
CS4340-KSZ-
Manufacturer:
cirrus
Quantity:
60 000
Part Number:
CS4340-KSZR
Manufacturer:
CIRRUS
Quantity:
20 000
LIST OF FIGURES
LIST OF TABLES
DS297F3
5. PARAMETER DEFINITIONS ................................................................................................................21
6. REFERENCES ......................................................................................................................................22
7. PACKAGE DIMENSIONS ....................................................................................................................23
8. PACKAGE THERMAL RESISTANCE .................................................................................................25
Figure 1. Output Test Load ...........................................................................................................................6
Figure 2. Maximum Loading..........................................................................................................................6
Figure 3. Single-Speed Stopband Rejection .................................................................................................9
Figure 4. Single-Speed Transition Band .......................................................................................................9
Figure 5. Single-Speed Transition Band (Detail)...........................................................................................9
Figure 6. Single-Speed Passband Ripple .....................................................................................................9
Figure 7. Double-Speed Stopband Rejection................................................................................................9
Figure 8. Double-Speed Transition Band......................................................................................................9
Figure 9. Double-Speed Transition Band (Detail) .......................................................................................10
Figure 10. Double-Speed Passband Ripple................................................................................................10
Figure 11. Serial Input Timing (External SCLK) ..........................................................................................11
Figure 12. Internal Serial Mode Input Timing ..............................................................................................12
Figure 13. Internal Serial Clock Generation ................................................................................................12
Figure 14. Typical Connection Diagram......................................................................................................15
Figure 15. CS4340 Format 0 - I
Figure 16. CS4340 Format 1 - Left Justified up to 24-Bit Data ...................................................................17
Figure 17. CS4340 Format 2 - Right Justified, 24-Bit Data.........................................................................18
Figure 18. CS4340 Format 3 - Right Justified, 16-Bit Data.........................................................................18
Figure 19. De-Emphasis Curve...................................................................................................................18
Table 1.CS4340 Speed Modes ...................................................................................................................16
Table 2.Single-Speed Mode Standard Frequencies ...................................................................................16
Table 3.Double-Speed Mode Standard Frequencies..................................................................................16
Table 4.Internal SCLK/LRCK Ratio.............................................................................................................17
Table 5.Digital Interface Format - DIF1 and DIF0 .......................................................................................17
Table 6.De-Emphasis Control .....................................................................................................................18
7.1 SOIC ..............................................................................................................................................23
7.2 TSSOP ..........................................................................................................................................24
2
S up to 24-Bit Data ..................................................................................17
CS4340
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