DSPIC33FJ64MC706T-I/PT Microchip Technology, DSPIC33FJ64MC706T-I/PT Datasheet - Page 209
![IC,DSP,16-BIT,CMOS,TQFP,64PIN,PLASTIC](/photos/6/81/68123/c04-066_pf_sml.jpg)
DSPIC33FJ64MC706T-I/PT
Manufacturer Part Number
DSPIC33FJ64MC706T-I/PT
Description
IC,DSP,16-BIT,CMOS,TQFP,64PIN,PLASTIC
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheets
1.MA330013.pdf
(370 pages)
2.DSPIC33FJ12GP201-ISO.pdf
(90 pages)
3.DSPIC33FJ64MC506-IPT.pdf
(340 pages)
4.DSPIC33FJ64MC506-IPT.pdf
(30 pages)
Specifications of DSPIC33FJ64MC706T-I/PT
Rohs Compliant
YES
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32AC164327 - MODULE SKT FOR 64TQFP
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC33FJ64MC706T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
- MA330013 PDF datasheet
- DSPIC33FJ12GP201-ISO PDF datasheet #2
- DSPIC33FJ64MC506-IPT PDF datasheet #3
- DSPIC33FJ64MC506-IPT PDF datasheet #4
- Current page: 209 of 370
- Download datasheet (6Mb)
FIGURE 17-2:
FIGURE 17-3:
FIGURE 17-4:
© 2007 Microchip Technology Inc.
Note 1:Using the SSx pin in Slave mode of operation is optional.
2:
PROCESSOR 1 (SPI Master)
(MSTEN (SPIxCON1<5>) = 1)
User must write transmit data to/read received data from SPIxBUF. The SPIxTXB and SPIxRXB registers are memory
mapped to SPIxBUF.
SPI MASTER/SLAVE CONNECTION
SPI MASTER, FRAME MASTER CONNECTION DIAGRAM
SPI MASTER, FRAME SLAVE CONNECTION DIAGRAM
MSb
Serial Receive Buffer
Serial Transmit Buffer
(SPI Slave, Frame Slave)
(SPI Master, Frame Slave)
Shift Register
(SPIxBUF)
(SPIxRXB)
(SPIxTXB)
SPI Buffer
(SPIxSR)
dsPIC33F
dsPIC33F
(2)
LSb
SDOx
SCKx
SDOx
SCKx
SDIx
SDOx
SDIx
SCKx
SSx
SDIx
SSx
Preliminary
Serial Clock
Serial Clock
Frame Sync
Pulse
Serial Clock
Frame Sync
Pulse
(SSEN (SPIxCON1<7>) = 1 and MSTEN (SPIxCON1<5>) = 0)
SDIx
SDOx
SCKx
SSx
SDIx
SDOx
SCKx
SSx
SDIx
SDOx
SCKx
SSx
(1)
PROCESSOR 2 (SPI Slave)
MSb
Serial Receive Buffer
Serial Transmit Buffer
PROCESSOR 2
PROCESSOR 2
Shift Register
(SPIxBUF)
(SPIxRXB)
(SPIxTXB)
SPI Buffer
(SPIxSR)
(2)
LSb
dsPIC33F
DS70165E-page 207
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